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数据搜索系统，热门电子元器件搜索 |
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ST7263BEx 数据表(PDF) 81 Page - STMicroelectronics |
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ST7263BEx 数据表(HTML) 81 Page - STMicroelectronics |
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81 / 186 page  ST7263Bxx On-chip peripherals Doc ID 7516 Rev 8 81/186 Through these pins, serial data is transmitted and received as frames comprising: ● An Idle Line prior to transmission or reception ● A start bit ● A data word (8 or 9 bits) least significant bit first ● A Stop bit indicating that the frame is complete. This interface uses two types of baud rate generator: ● A conventional type for commonly-used baud rates. Figure 41. SCI block diagram WAKE UP UNIT RECEIVER CONTROL SR TRANSMIT CONTROL TDRE TC RDRF IDLE OR NF FE PE SCI CONTROL INTERRUPT CR1 R8 T8 SCID M WAKE PCE PS PIE Received Data register (RDR) Received Shift register Read Transmit Data register (TDR) Transmit Shift register Write RDI TDO (DATA REGISTER) DR TRANSMITTER CLOCK RECEIVER CLOCK RECEIVER RATE TRANSMITTER RATE BRR SCP1 fCPU CONTROL CONTROL SCP0 SCT2 SCT1 SCT0 SCR2 SCR1SCR0 /PR /16 BAUD RATE GENERATOR SBK RWU RE TE ILIE RIE TCIE TIE CR2 |
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