| 数据搜索系统,热门电子元器件搜索 |
|
ST7263BEx 数据表(PDF) 98 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST7263BEx 数据表(HTML) 98 Page - STMicroelectronics |
|
98 / 186 page ![]() On-chip peripherals ST7263Bxx 98/186 Doc ID 7516 Rev 8 Figure 44. USB block diagram 11.4.4 Register description DMA Address register (DMAR) Reset value: undefined Software must write the start address of the DMA memory area whose most significant bits are given by DA15-DA6. The remaining 6 address bits are set by hardware. See the description of the IDR register and Figure 45. CPU MEMORY Transceiver 3.3 V Voltage Regulator SIE ENDPOINT DMA INTERRUPT Address, and interrupts USBDM USBDP USBVCC 6 MHz REGISTERS REGISTERS data buses USBGND 7 0 DA15 DA14 DA13 DA12 DA11 DA10 DA9 DA8 Read.write [7:0] DA[15:8] DMA address bits 15-8. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |