ST7263BEx datasheet(40/186 Pages) STMICROELECTRONICS

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Power saving modes

ST7263Bxx

40/186

Doc ID 7516 Rev 8

Power saving modes

8.1

Introduction

To give a large measure of flexibility to the application in terms of power consumption, two

main power saving modes are implemented in the ST7.

After a Reset, the normal operating mode is selected by default (Run mode). This mode

drives the device (CPU and embedded peripherals) by means of a master clock which is

based on the main oscillator frequency divided by 3 (fCPU).

From Run mode, the different power saving modes may be selected by setting the relevant

oscillator status.

8.2

Halt mode

The MCU consumes the least amount of power in Halt mode. The Halt mode is entered by

executing the Halt instruction. The internal oscillator is then turned off, causing all internal

processing to be stopped, including the operation of the on-chip peripherals.

When entering Halt mode, the I bit in the Condition Code register is cleared. Thus, all

external interrupts (ITi or USB end suspend mode) are allowed and if an interrupt occurs,

the CPU clock becomes active.

The MCU can exit Halt mode on reception of either an external interrupt on ITi, an end

suspend mode interrupt coming from USB peripheral, or a reset. The oscillator is then

turned on and a stabilization time is provided before releasing CPU operation. The

stabilization time is 4096 CPU clock cycles.

After the start up delay, the CPU continues operation by servicing the interrupt which wakes

it up or by fetching the reset vector if a reset wakes it up.

ST7263BEx 数据表(PDF) 40 Page - STMicroelectronics