ST7263BEx datasheet(72/186 Pages) STMICROELECTRONICS

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On-chip peripherals

ST7263Bxx

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Doc ID 7516 Rev 8

11.2.4

Low power modes

11.2.5

Interrupts

The 16-bit Timer interrupt events are connected to the same interrupt vector (see Interrupts

chapter). These events generate an interrupt if the corresponding Enable Control Bit is set

and the interrupt mask in the CC register is reset (RIM instruction).

11.2.6

Summary of timer modes

Table 21.

Low power modes

Mode

Description

WAIT

No effect on 16-bit Timer. Timer interrupts cause the device to exit from Wait mode.

HALT

16-bit Timer registers are frozen.

In Halt mode, the counter stops counting until Halt mode is exited. Counting resumes from

the previous count when the MCU is woken up by an interrupt with “exit from Halt mode”

capability or from the counter reset value when the MCU is woken up by a RESET.

If an input capture event occurs on the ICAPi pin, the input capture detection circuitry is

armed. Consequently, when the MCU is woken up by an interrupt with “exit from Halt

mode” capability, the ICFi bit is set, and the counter value present when exiting from Halt

mode is captured into the ICiR register.

Table 22.

Interrupts

Interrupt Event

Event flag

Enable Control

bit

Exit from

Wait

Exit from

Halt

Input Capture 1 event/Counter reset in PWM mode

ICF1

ICIE

Yes

Input Capture 2 event

ICF2

Output Compare 1 event (not available in PWM mode)

OCF1

OCIE

Output Compare 2 event (not available in PWM mode)

OCF2

Timer Overflow event

TOF

TOIE

Table 23.

Summary of timer modes

Modes

Timer Resources

Input

Capture 1

Input Capture 2

Output

Compare 1

Output

Compare 2

Input Capture (1 and/or 2)

Yes

Output Compare (1 and/or 2)

One Pulse mode

Not recommended(1)

See note 4 in Section : One Pulse mode.

Partially(2)

See note 5 in Section : One Pulse mode.

PWM mode

Not recommended(3)

See note 4 in Section : Pulse width modulation mode.

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