ADE5166 datasheet(85/156 Pages) AD

85 / 156 page

ADE5166/ADE5169/ADE5566/ADE5569

Rev. B | Page 85 of 156

Code Memory

Code and data memory is stored in the 62 kB flash memory

space. No external code memory is supported. To access code

memory, code indirect addressing is used.

ADDRESSING MODES

The 8052 core provides several addressing modes. The address-

ing mode determines how the core interprets the memory location

or data value specified in assembly language code. There are six

addressing modes, as shown in Table 67.

Table 67. 8052 Addressing Modes

Addressing Mode

Example

Bytes

Core Clock

Cycles

Immediate

MOV A, #A8h

MOV DPTR, #A8h

Direct

MOV A, A8h

MOV A, IE

MOV A, R0

Indirect

MOV A, @R0

Extended Direct

MOVX A, @DPTR

Extended Indirect

MOVX A, @R0

Code Indirect

MOVC A, @A+DPTR

MOVC A, @A+PC

JMP @A+DPTR

Immediate Addressing

In immediate addressing, the expression entered after the number

sign (#) is evaluated by the assembler and stored in the memory

address specified. This number is referred to as a literal because

it refers only to a value and not to a memory location. Instructions

using this addressing mode are slower than those between two

registers because the literal must be stored and fetched from

memory. The expression can be entered as a symbolic variable or

an arithmetic expression; the value is computed by the assembler.

Direct Addressing

With direct addressing, the value at the source address is moved

to the destination address. Direct addressing provides the fastest

execution time of all the addressing modes when an instruction

is performed between registers using direct addressing. Note that

indirect or direct addressing modes can be used to access general-

purpose RAM Address 0x00 through Address 0x7F. An instruction

with direct addressing that uses an address between 0x80 and

0xFF is referring to a special function memory location.

Indirect Addressing

With indirect addressing, the value pointed to by the register is

moved to the destination address. For example, to move the

contents of internal RAM Address 0x82 to the accumulator, use

the following two instructions, which require a total of four

clock cycles and three bytes of storage in the program memory:

MOV

R0,#82h

MOV

A,@R0

Indirect addressing allows addresses to be computed and is

useful for indexing into data arrays stored in RAM.

Note that an instruction that refers to Address 0x00 through

Address 0x7F is referring to internal RAM, and indirect or direct

addressing modes can be used. An instruction with indirect

addressing that uses an address between 0x80 and 0xFF is

referring to internal RAM, not to an SFR.

Extended Direct Addressing

The DPTR register is used to access extended internal RAM in

extended indirect addressing mode. The ADE5166/ADE5169/

ADE5566/ADE5569 provide 2 kB of extended internal RAM

(XRAM), accessed through MOVX instructions. External

memory spaces are not supported on the ADE5166/ADE5169/

ADE5566/ADE5569.

In extended direct addressing mode, the DPTR register points

to the address of the byte of extended RAM. The following code

moves the contents of extended RAM Address 0x100 to the

accumulator:

MOV

DPTR,#100h

MOVX

A,@DPTR

These two instructions require a total of seven clock cycles and

four bytes of storage in the program memory.

Extended Indirect Addressing

The extended internal RAM is accessed through a pointer to the

address in indirect addressing mode. The ADE5166/ADE5169/

ADE5566/ADE5569 provide 2 kB of extended internal RAM,

accessed through MOVX instructions. External memory is not

supported on the ADE5166/ADE5169/ADE5566/ADE5569.

In extended indirect addressing mode, a register holds the

address of the byte of extended RAM. The following code

moves the contents of extended RAM Address 0x80 to the

accumulator:

MOV

R0, #80h

MOVX

A, @R0

These two instructions require six clock cycles and three bytes

of storage.

Note that there are 2 kB of extended RAM, so both extended

direct and extended indirect addressing can cover the whole

address range. There is a storage and speed advantage to using

extended indirect addressing because the additional byte of

addressing available through the DPTR register that is not

needed is not stored.

From the three examples demonstrating the access of internal

RAM from 0x80 through 0xFF and extended internal RAM

from 0x00 through 0xFF, it can be seen that it is most efficient

to use the entire internal RAM accessible through indirect

access before moving to extended RAM.

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