ADE5166 datasheet(150/156 Pages) AD

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ADE5166/ADE5169/ADE5566/ADE5569

Rev. B | Page 150 of 156

Table 168. Port 0 Alternate Functions

No.

Alternate Function

Alternate Function Enable

P0.0

BCTRL external battery control input

Set INT1PRG = X01 in the interrupt pins configuration SFR (INTPR, Address 0xFF[3:1]).

INT1 external interrupt

Set EX1 in the interrupt enable SFR (IE, Address 0xA8[2]).

INT1 wake-up from PSM2 operating mode

Set INT1PRG = 11X in the interrupt pins configuration SFR (INTPR, Address 0xFF[3:1]).

P0.1

FP19 LCD segment pin

Set FP19EN in the LCD Segment Enable 2 SFR (LCDSEGE2, Address 0xED[3]).

P0.2

CF1 ADE calibration frequency output

Clear the DISCF1 bit in the ADE energy measurement internal MODE1 register

(Address 0x0B[1]).

P0.3

CF2 ADE calibration frequency output

Clear the DISCF2 bit in the ADE energy measurement internal MODE1 register

(Address 0x0B[2]).

P0.4

MOSI SPI data line

Set the SCPS bit in the configuration SFR (CFG, Address 0xAF[5]), and set the

SPIEN bit in SPI Configuration SFR 2 (SPIMOD2, Address 0xE9[6]).

SDATA I2C data line

Clear the SCPS bit in the configuration SFR (CFG, Address 0xAF[5]), and set the

I2CEN bit in the I2C mode SFR (I2CMOD, Address 0xE8[7]).

P0.5

MISO SPI data line

Set the SCPS bit in the configuration SFR (CFG, Address 0xAF[5]), and set the

SPIEN bit in SPI Configuration SFR 2 (SPIMOD2, Address 0xE9[6]).

Zero-Crossing Detection 2

Set the ZX2 bit in the MODE3 energy measurement SFR (MODE3, Address 0x2B[0]).

P0.6

SCLK serial clock for I2C or SPI

Set the I2CEN bit in the I2C mode SFR (I2CMOD, Address 0xE8[7]) or the SPIEN bit in

SPI Configuration SFR 2 (SPIMOD2, Address 0xE9[6]) to enable the I2C or SPI interface.

T0 Timer 0 input

Set the C/T0 bit in the Timer/Counter 0 and Timer/Counter 1 mode SFR (TMOD,

Address 0x89[2]) to enable T0 as an external event counter.

P0.7

SS SPI slave select input for SPI in slave mode

Set the SS_EN bit in SPI Configuration SFR 1 (SPIMOD1, Address 0xE8[3]).

SS SPI slave select output for SPI in master mode

Set the SPIMS_b bit in SPI Configuration SFR 2 (SPIMOD2, Address 0xE9[4]).

T1 Timer 1 input

Set the C/T1 bit in the Timer/Counter 0 and Timer/Counter 1 mode SFR (TMOD,

Address 0x89[6]) to enable T1 as an external event counter.

RxD2 receiver data input for UART2

RxD2 edge wake-up from PSM2 operating mode

Set the REN2 bit in the Serial Communications Control 2 SFR (SCON2, Address 0xE1[2]).

Set RXPROG bits = 11 in the peripheral configuration SFR (PERIPH, Address 0xF4[1:0]).

Table 169. Port 1 Alternate Functions

No.

Alternate Function

Alternate Function Enable

P1.0

RxD receiver data input for UART

Set the REN bit in the serial communications control SFR (SCON, Address 0x98[4]).

P1.1

TxD transmitter data output for UART

This pin becomes TxD as soon as data is written into SBUF.

P1.2

FP25 LCD segment pin

Set the FP25EN bit in the LCD segment enable SFR (LCDSEGE, Address 0x97[7]).

Zero-Crossing Detection 1

Set the ZX1 bit in the MODE3 energy measurement register (MODE3, Address 0x2B[1]).

P1.3

FP24 LCD segment pin

Set the FP24EN bit in the LCD segment enable SFR (LCDSEGE, Address 0x97[6]).

T2EX Timer 2 control input

Set the EXEN2 bit in the Timer/Counter 2 control SFR (T2CON, Address 0xC8[3]).

P1.4

FP23 LCD segment pin

Set the FP23EN bit in the LCD segment enable SFR (LCDSEGE, Address 0x97[5]).

T2 Timer 2 input

Set the C/T2 bit in the Timer/Counter 2 control SFR (T2CON, Address 0xC8[1]) to

enable T2 as an external event counter.

P1.5

FP22 LCD segment pin

Set the FP22EN bit in the LCD segment enable SFR (LCDSEGE, Address 0x97[4]).

P1.6

FP21 LCD segment pin

Set the FP21EN bit in the LCD segment enable SFR (LCDSEGE, Address 0x97[3]).

P1.7

FP20 LCD segment pin

Set the FP20EN bit in the LCD segment enable SFR (LCDSEGE, Address 0x97[2]).

Table 170. Port 2 Alternate Functions

No.

Alternate Function

Alternate Function Enable

P2.0

FP18 LCD segment pin

Set the FP18EN bit in the LCD Segment Enable 2 SFR (LCDSEGE2, Address 0xED[2]).

P2.1

FP17 LCD segment pin

Set the FP17EN bit in the LCD Segment Enable 2 SFR (LCDSEGE2, Address 0xED[1]).

P2.2

FP16 LCD segment pin

Set the FP16EN bit in the LCD Segment Enable 2 SFR (LCDSEGE2, Address 0xED[0]).

P2.3

SDEN serial download pin sampled on reset; P2.3

is an output only; TxD2 is the transmitter data

output for UART2

Enabled by default. This pin becomes TxD2 as soon as data is written into SBUF2.

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