H5GQ1H24AFR-R0C datasheet(124/173 Pages) HYNIX

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This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

responsability for use of circuits described. No patent licenses are implied.

Rev. 1.0 /Nov. 2009

124

H5GQ1H24AFR

6.2. AC & DC CHARACTERISTICS

All GDDR5 SGRAMs are designed for 1.5V typical voltage supplies. The interface of GDDR5 with 1.5V

VDDQ will follow the POD15 specification. All AC and DC values are measured at the ball.

Notes:

1. VDD/VDDQ 1.6V is for 6Gbps

2. GDDR5 SGRAMs are designed to tolerate PCB designs with separate VDD and VDDQ power regulators.

3. AC noise in the system is estimated at 50mV pk‐pk for the purpose of DRAM design.

4. Source of Reference Voltage and control of Reference Voltage for DQ and DBI# pins is determined by VREFD, Half VREFD, Auto

VREFD, VREFD MERGE and VREFD Offsets mode registers.

5. VREFD Offsets are not supported with VREFD2.

6. External VREFC is to be provided by the controller as there is no other alternative supply.

7. DQ/DBI# input slew rate must be greater than or equal to 3V/ns. The slew rate is measured between VREFD crossing and VIHD(AC)

or VILD(AC) or VREFD2 crossing and VIHD2(AC) or VILD2(AC).

8. ADR/CMD input slew rate must be greater than or equal to 3V/ns. The slew rate is measured between VREFC crossing and

VIHA(AC) or VILA(AC).

9. VIHX and VILX define the voltage levels for the receiver that detects x32 or x16 mode with RESET# going High.

Table 39 DC Operating Conditions

Parameter

Symbol

Min

Typ

Max

Unit

Note

Device Supply Voltage

VDD

1.452

1.6

1.648

Output Supply Voltage

VDDQ

1.452

1.6

1.648

Device Supply Voltage

VDD

1.455

1.5

1.545

Output Supply Voltage

VDDQ

1.455

1.5

1.545

Reference Voltage for DQ and DBI# pins

VREFD

0.69 * VDDQ

0.71 * VDDQ

3, 4

Reference Voltage for DQ and DBI# pins

VREFD2

0.49 * VDDQ

0.51 * VDDQ

3, 4, 5

External Reference Voltage for address and

command

VREFC

0.69 * VDDQ

0.71 * VDDQ

DC Input Logic HIGH Voltage for address and

command

VIHA (DC)

VREFC + 0.15

DC Input Logic LOW Voltage for address and

command

VILA (DC)

VREFC ‐ 0.15

DC Input Logic HIGH Voltage for DQ and DBI#

pins with VREFD

VIHD (DC)

VREFD + 0.10

DC Input Logic LOW Voltage for DQ and DBI#

pins with VREFD

VILD (DC)

VREFD ‐ 0.10

DC Input Logic HIGH Voltage for DQ and DBI#

pins with VREFD2

VIHD2

(DC)

VREFD2 + 0.30

DC Input Logic LOW Voltage for DQ and DBI#

pins with VREFD2

VILD2 (DC)

VREFD2 ‐ 0.30

Input Logic HIGH Voltage for RESET#, SEN, MF

VIHR

VDDQ ‐ 0.50

Input Logic LOW Voltage for RESET#, SEN, MF

VILR

0.30

Input logic HIGH voltage for

EDC1/2 (x16 mode detect)

VIHX

VDDQ ‐ 0.3

Input logic LOW voltage for

EDC1/2 (x16 mode detect)

VILX

0.30

Input Leakage Current

Any Input 0V <= VIN <= VDDQ

(All other pins not under test = 0V)

μA

Output Leakage Current

(DQs are disabled; 0V <= Vout <= VDDQ)

Ioz

μA

Output Logic LOW Voltage

VOL (DC)

0.62

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