EM357-RTR datasheet(137/240 Pages) ETC2

137 / 240 page

EM351 / EM357

Because the buffer registers are only transferred to the shadow registers when a UEV occurs, before starting

the counter initialize all the registers by setting the TIM_UG bit in the TIMx_EGR register.

OCy polarity is software programmable using the TIM_CCyP bit in the TIMx_CCER register. It can be

programmed as active high or active low. OCy output is enabled by the TIM_CCyE bit in the TIMx_CCER

In PWM mode (1 or 2), TIMx_CNT and TIMx_CCRy are always compared to determine whether

TIMx_CCRy ≤ TIMx_CNT or TIMx_CNT ≤ TIMx_CCRy,depending on the direction of the counter. The OCyREF

signal is asserted only:

When the result of the comparison changes, or

When the output compare mode (TIM_OCyM bits in the TIMx_CCMR1 register) switches from the “frozen”

configuration (no comparison, TIM_OCyM = 000) to one of the PWM modes (TIM_OCyM = 110 or 111).

This allows software to force a PWM output to a particular state while the timer is running.

The timer is able to generate PWM in edge-aligned mode or center-aligned mode depending on the TIM_CMS

bits in the TIMx_CR1 register.

9.3.9.1

PWM Edge-Aligned Mode: Up-Counting Configuration

Up-counting is active when the TIM_DIR bit in the TIMx_CR1 register is low. Refer to the section Up-Counting

Mode.

The following example uses PWM mode 1. The reference PWM signal OCyREF is high as long as

TIMx_CNT < TIMx_CCRy, otherwise it becomes low. If the compare value in TIMx_CCRy is greater than the

auto-reload value in TIMx_ARR, then OCyREF is held at 1. If the compare value is 0, then OCyREF is held at 0.

Figure 9-22 shows some edge-aligned PWM waveforms in an example, where TIMx_ARR = 8.

Figure 9-22. Edge-Aligned PWM Waveforms (ARR = 8)

9.3.9.2

PWM Edge-Aligned Mode: Down-Counting Configuration

Down-counting is active when the TIM_DIR bit in the TIMx_CR1 register is high. Refer to the Down-Counting

Mode section for more information.

In PWM mode 1, the reference signal OCyREF is low as long as TIMx_CNT > TIMx_CCRy, otherwise it becomes

high. If the compare value in TIMx_CCRy is greater than the auto-reload value in TIMx_ARR, then OCyREF is

held at 1. Zero-percent PWM is not possible in this mode.

9-17

120-035X-000D

Preliminary

EM357-RTR 数据表(PDF) 137 Page - List of Unclassifed Manufacturers