EM357-RTR datasheet(139/240 Pages) ETC2

139 / 240 page

EM351 / EM357

Hints on using center-aligned mode:

When starting in center-aligned mode, the current up-down configuration is used. This means that the

counter counts up or down depending on the value written in the TIM_DIR bit in the TIMx_CR1 register. The

TIM_DIR and TIM_CMS bits must not be changed at the same time by the software.

Writing to the counter while running in center-aligned mode is not recommended as it can lead to

unexpected results. In particular:

• The direction is not updated when the value written to the counter that is greater than the auto-

reload value (TIMx_CNT > TIMx_ARR). For example, if the counter was counting up, it continues to

count up.

• The direction is updated when 0 or the TIMx_ARR value is written to the counter, but no UEV is

generated.

The safest way to use center-aligned mode is to generate an update by software (setting the TIM_UG bit in

the TIMx_EGR register) just before starting the counter, and not to write the counter while it is running.

9.3.10 One-Pulse Mode

One-pulse mode (OPM) is a special case of the previous modes. It allows the counter to be started in response

to a stimulus and to generate a pulse with a programmable length after a programmable delay.

Starting the counter can be controlled through the slave mode controller. Generating the waveform can be

done in output compare mode or PWM mode. Select OPM by setting the TIM_OPM bit in the TIMx_CR1 register.

This makes the counter stop automatically at the next UEV.

A pulse can be correctly generated only if the compare value is different from the counter initial value.

Before starting (when the timer is waiting for the trigger), the configuration must be:

In up-counting: TIMx_CNT < TIMx_CCRy ≤ TIMx_ARR (in particular, 0 < TIMx_CCRy),

In down-counting: TIMx_CNT > TIMx_CCRy.

For example, to generate a positive pulse on OC1 with a length of tPULSE and after a delay of tDELAY as soon as a

rising edge is detected on the TI2 input pin, using TI2FP2 as trigger 1:

Map TI2FP2 on TI2: Write TIM_IC2S = 01 in the TIMx_CCMR1 register.

TI2FP2 must detect a rising edge. Write TIM_CC2P = 0 in the TIMx_CCER register.

Configure TI2FP2 as trigger for the slave mode controller (TRGI): Write TIM_TS = 110 in the TIMx_SMCR

Use TI2FP2 to start the counter: Write TIM_SMS to 110 in the TIMx_SMCR register (trigger mode).

The OPM waveform is defined: Write the compare registers, taking into account the clock frequency and

the counter prescaler.

• The tDELAY is defined by the value written in the TIMx_CCR1 register.

• The tPULSE is defined by the difference between the auto-reload value and the compare value

(TIMx_ARR - TIMx_CCR1).

To build a waveform with a transition from 0 to 1 when a compare match occurs and a transition from 1 to

0 when the counter reaches the auto-reload value:

• Enable PWM mode 2: Write TIM_OC1M = 111 in the TIMx_CCMR1 register.

• Optionally, enable the buffer registers: Write TIM_OC1BE = 1 in the TIMx_CCMR1 register and

TIM_ARBE in the TIMx_CR1 register. In this case, also write the compare value in the TIMx_CCR1

bit, and wait for external trigger event on TI2. TIM_CC1P is written to 0 in this example.

In the example, the TIM_DIR and TIM_CMS bits in the TIMx_CR1 register should be low.

Since only one pulse is desired, software should set the TIM_OPM bit in the TIMx_CR1 register to stop the

counter at the next UEV (when the counter rolls over from the auto-reload value back to 0).

9-19

120-035X-000D

Preliminary

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