HCS12 datasheet(237/452 Pages) FREESCALE

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Glossary

S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

237

Operation:

(M : M + 11) ⇒ M : M + 12

Description:

Moves the content of one 16-bit location in memory to another 16-bit

location in memory. The content of the source memory location is not

changed.

Move instructions use separate addressing modes to access the source and

destination of a move. The following combinations of addressing modes are

supported: IMM–EXT, IMM–IDX, EXT–EXT, EXT–IDX, IDX–EXT, and

IDX–IDX. IDX operands allow indexed addressing mode specifications that

fit in a single postbyte including 5-bit constant, accumulator offsets, and

auto increment/decrement modes. Nine-bit and 16-bit constant offsets

would require additional extension bytes and are not allowed. Indexed

indirect modes (for example [D,r]) are also not allowed.

There are special considerations when using PC-relative addressing with

move instructions. These are discussed in 3.10 Instructions Using

Multiple Modes.

MOVW

Move a Word of Data

from One Memory Location to Another

MOVW

CCR Details:

HIN

––––––––

Source Form(1)

1. The first operand in the source code statement specifies the source for the move.

Address

Mode

Object Code

Access Detail

HCS12

M68HC12

MOVW #opr16i, opr16a

MOVW #opr16i, oprx0_xysp

MOVW opr16a, opr16a

MOVW opr16a, oprx0_xysp

MOVW oprx0_xysp, opr16a

MOVW oprx0_xysp, oprx0_xysp

IMM–EXT

IMM–IDX

EXT–EXT

EXT–IDX

IDX–EXT

IDX–IDX

18 03 jj kk hh ll

18 00 xb jj kk

18 04 hh ll hh ll

18 01 xb hh ll

18 05 xb hh ll

18 02 xb xb

OPWPO

OPPW

ORPWPO

OPRPW

ORPWP

ORPWO

OPWPO

OPPW

ORPWPO

OPRPW

ORPWP

ORPWO

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