HCS12 datasheet(36/452 Pages) FREESCALE

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S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

Indexed addressing mode instructions use a postbyte to specify index

registers (X and Y), stack pointer (SP), or program counter (PC) as the base

index register and to further classify the way the effective address is formed.

A special group of instructions cause this calculated effective address to be

loaded into an index register for further calculations:

• Load stack pointer with effective address (LEAS)

• Load X with effective address (LEAX)

• Load Y with effective address (LEAY)

Table 3-2. Summary of Indexed Operations

Postbyte

Code (xb)

Source

Code

Syntax

Comments

rr; 00 = X, 01 = Y, 10 = SP, 11 = PC

rr0nnnnn

n,r

–n,r

5-bit constant offset n = –16 to +15

r can specify X, Y, SP, or PC

111rr0zs

n,r

–n,r

Constant offset (9- or 16-bit signed)

z- 0 = 9-bit with sign in LSB of postbyte(s)

–256

≤ n ≤ 255

1 = 16-bit

–32,768

≤ n ≤ 65,535

if z = s = 1, 16-bit offset indexed-indirect (see below)

r can specify X, Y, SP, or PC

111rr011

[n,r]

16-bit offset indexed-indirect

rr can specify X, Y, SP, or PC

–32,768

≤ n ≤ 65,535

rr1pnnnn

n,–r n,+r

n,r–

n,r+

Auto predecrement, preincrement, postdecrement,or postincrement;

p = pre-(0) or post-(1), n = –8 to –1, +1 to +8

r can specify X, Y, or SP (PC not a valid choice)

+8 = 0111

…

+1 = 0000

–1 = 1111

…

–8 = 1000

111rr1aa

A,r

B,r

D,r

Accumulator offset (unsigned 8-bit or 16-bit)

aa-00 = A

01 = B

10 = D (16-bit)

11 = see accumulator D offset indexed-indirect

r can specify X, Y, SP, or PC

111rr111

[D,r]

Accumulator D offset indexed-indirect

r can specify X, Y, SP, or PC

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