HCS12 datasheet(40/452 Pages) FREESCALE

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S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

In the STAA 1,–SP example, the stack pointer is pre-decremented by one

and then A is stored to the address contained in the stack pointer. Similarly

the LDX 2,SP+ first loads X from the address in the stack pointer, then

post-increments SP by two.

Example:

MOVW

2,X+,4,+Y

This example demonstrates how to work with data structures larger than

bytes and words. With this instruction in a program loop, it is possible to

move words of data from a list having one word per entry into a second table

that has four bytes per table element. In this example the source pointer is

updated after the data is read from memory (post-increment) while the

destination pointer is updated before it is used to access memory

(pre-increment).

3.9.6 Accumulator Offset Indexed Addressing

In this indexed addressing mode, the effective address is the sum of the

values in the base index register and an unsigned offset in one of the

accumulators. The value in the index register itself is not changed. The

index register can be X, Y, SP, or PC and the accumulator can be either of

the 8-bit accumulators (A or B) or the 16-bit D accumulator.

Example:

LDAA

B,X

This instruction internally adds B to X to form the address from which A will

be loaded. B and X are not changed by this instruction. This example is

similar to the following 2-instruction combination in an M68HC11.

Examples:

ABX

LDAA

0,X

However, this 2-instruction sequence alters the index register. If this

sequence was part of a loop where B changed on each pass, the index

pass. The use of LDAA B,X is more efficient in the CPU12.

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