HCS12 datasheet(38/452 Pages) FREESCALE

38 / 452 page

S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

This variation of the indexed addressing mode in the CPU12 is similar to the

M68HC11 indexed addressing mode, but is functionally enhanced. The

M68HC11 CPU provides for unsigned 8-bit constant offset indexing from X

or Y, and use of Y requires an extra instruction byte and thus, an extra

execution cycle. The 9-bit signed offset used in the CPU12 covers the same

range of positive offsets as the M68HC11, and adds negative offset

capability. The CPU12 can use X, Y, SP, or PC as the base index register.

3.9.3 16-Bit Constant Offset Indexed Addressing

This indexed addressing mode uses a 16-bit offset which is added to the

base index register (X, Y, SP, or PC) to form the effective address of the

memory location affected by the instruction. This allows access to any

address in the 64-Kbyte address space. Since the address bus and the

offset are both 16 bits, it does not matter whether the offset value is

considered to be a signed or an unsigned value ($FFFF may be thought of

as +65,535 or as –1). The 16-bit offset is provided as two extension bytes

after the instruction postbyte in the instruction flow.

3.9.4 16-Bit Constant Indirect Indexed Addressing

This indexed addressing mode adds a 16-bit instruction-supplied offset to

the base index register to form the address of a memory location that

contains a pointer to the memory location affected by the instruction. The

instruction itself does not point to the address of the memory location to be

acted upon, but rather to the location of a pointer to the address to be acted

on. The square brackets distinguish this addressing mode from 16-bit

constant offset indexing.

Example:

LDAA

[10,X]

In this example, X holds the base address of a table of pointers. Assume

that X has an initial value of $1000, and that the value $2000 is stored at

addresses $100A and $100B. The instruction first adds the value 10 to the

value in X to form the address $100A. Next, an address pointer ($2000) is

fetched from memory at $100A. Then, the value stored in location $2000 is

read and loaded into the A accumulator.

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