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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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HCS12 数据表(PDF) 62 Page - Freescale Semiconductor, Inc |
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HCS12 数据表(HTML) 62 Page - Freescale Semiconductor, Inc |
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62 / 452 page  S12CPUV2 Reference Manual, Rev. 4.0 62 Freescale Semiconductor 5.9 Compare and Test Instructions Compare and test instructions perform subtraction between a pair of registers or between a register and memory. The result is not stored, but condition codes are set by the operation. These instructions are generally used to establish conditions for branch instructions. In this architecture, most instructions update condition code bits automatically, so it is often unnecessary to include separate test or compare instructions. Table 5-7 is a summary of compare and test instructions. Table 5-7. Compare and Test Instructions Mnemonic Function Operation Compare Instructions CBA Compare A to B (A) – (B) CMPA Compare A to memory (A) – (M) CMPB Compare B to memory (B) – (M) CPD Compare D to memory (16-bit) (A : B) – (M : M + 1) CPS Compare SP to memory (16-bit) (SP) – (M : M + 1) CPX Compare X to memory (16-bit) (X) – (M : M + 1) CPY Compare Y to memory (16-bit) (Y) – (M : M + 1) Test Instructions TST Test memory for zero or minus (M) – $00 TSTA Test A for zero or minus (A) – $00 TSTB Test B for zero or minus (B) – $00 |
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