HCS12 datasheet(15/452 Pages) FREESCALE

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S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

1.1 Introduction

This manual describes the features and operation of the core (central

processing unit, or CPU, and development support functions) used in all

HCS12 microcontrollers. For reference, information is provided for the

M68HC12.

1.2 Features

The CPU12 is a high-speed, 16-bit processing unit that has a programming

model identical to that of the industry standard M68HC11 central processor

unit (CPU). The CPU12 instruction set is a proper superset of the M68HC11

instruction set, and M68HC11 source code is accepted by CPU12

assemblers with no changes.

• Full 16-bit data paths supports efficient arithmetic operation and

high-speed math execution

• Supports instructions with odd byte counts, including many

single-byte instructions. This allows much more efficient use of ROM

space.

• An instruction queue buffers program information so the CPU has

immediate access to at least three bytes of machine code at the start

of every instruction.

• Extensive set of indexed addressing capabilities, including:

–

Using the stack pointer as an indexing register in all indexed

operations

–

Using the program counter as an indexing register in all but auto

increment/decrement mode

–

Accumulator offsets using A, B, or D accumulators

–

Automatic index predecrement, preincrement, postdecrement,

and postincrement (by –8 to +8)

Reference Manual — S12CPUV2

Section 1. Introduction

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