HCS12 datasheet(293/452 Pages) FREESCALE

293 / 452 page

Glossary

S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

293

Operation:

If (Counter) = 0, then (PC) + $0003 + Rel

⇒ PC

Description:

Tests the specified counter register A, B, D, X, Y, or SP. If the counter

encoded into three bytes of machine code including a 9-bit relative offset

(–256 to +255 locations from the start of the next instruction).

DBEQ and IBEQ instructions are similar to TBEQ, except that the counter is

decremented or incremented rather than simply being tested. Bits 7 and 6

of the instruction postbyte are used to determine which operation is to be

performed.

TBEQ

Test and Branch if Equal to Zero

TBEQ

CCR Details:

HIN

––––––––

Source Form

Address

Mode

Object Code(1)

1. Encoding for lb is summarized in the following table. Bit 3 is not used (don’t care), bit 5 selects branch on zero (TBEQ – 0)

or not zero (TBNE – 1) versions, and bit 4 is the sign bit of the 9-bit relative offset. Bits 7 and 6 should be 0:1 for TBEQ.

Access Detail

HCS12

M68HC12

TBEQ abdxys,rel9

REL

04 lb rr

PPP/PPO

PPP

Count

Bits 2:0

Source Form

Object Code

(If Offset is Positive)

Object Code

(If Offset is Negative)

000

001

TBEQ A, rel9

TBEQ B, rel9

04 40 rr

04 41 rr

04 50 rr

04 51 rr

100

101

110

111

TBEQ D, rel9

TBEQ X, rel9

TBEQ Y, rel9

TBEQ SP, rel9

04 44 rr

04 45 rr

04 46 rr

04 47 rr

04 54 rr

04 55 rr

04 56 rr

04 57 rr

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