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HCS12 数据表(PDF) 364 Page - Freescale Semiconductor, Inc

部件名 HCS12
功能描述  HCS12 Microcontrollers
PDF  452 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

HCS12 数据表(HTML) 364 Page - Freescale Semiconductor, Inc

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S12CPUV2 Reference Manual, Rev. 4.0
364
Freescale Semiconductor
9.6 WAV Instruction Details
The WAV instruction performs weighted average calculations used in
defuzzification. The pseudo-instruction wavr is used to resume an
interrupted weighted average operation. WAV calculates the numerator and
denominator sums using:
Where n is the number of labels of a system output, Si are the singleton
positions from the knowledge base, and Fi are fuzzy outputs from RAM. Si
and Fi are 8-bit values. The 8-bit B accumulator holds the iteration count n.
Internal temporary registers hold intermediate sums, 24 bits for the
numerator and 16 bits for the denominator. This makes this instruction
suitable for n values up to 255 although eight is a more typical value. The
final long division is performed with a separate EDIV instruction immediately
after the WAV instruction. The WAV instruction returns the numerator and
denominator sums in the correct registers for the EDIV. (EDIV performs the
unsigned division Y = Y : D / X; remainder in D.)
Execution time for this instruction depends on the number of iterations
(labels for the system output). WAV is interruptible so that worst case
interrupt latency is not affected by the execution time for the complete
weighted average operation. WAV includes initialization for the 24-bit and
16-bit partial sums so the first entry into WAV looks different than a resume
from interrupt operation. The CPU12 handles this difficulty with a
pseudo-instruction (wavr), which is specifically intended to resume an
interrupted weighted average calculation. Refer to 9.6.3 Cycle-by-Cycle
Details for WAV and wavr for more detail.
9.6.1 Set Up Prior to Executing WAV
Before executing the WAV instruction, index registers X and Y and
accumulator B must be set up. Index register X is a pointer to the Si
singleton list. X must have the address of the first singleton value in the
knowledge base. Index register Y is a pointer to the fuzzy outputs Fi. Y must
have the address of the first fuzzy output for this system output. B is the
iteration count n. The B accumulator must be set to the number of labels for
this system output.
System Output
S
i
F
i
i1
=
n
∑
F
i
i1
=
n
∑
-----------------------
=



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