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HCS12 数据表(PDF) 127 Page - Freescale Semiconductor, Inc |
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HCS12 数据表(HTML) 127 Page - Freescale Semiconductor, Inc |
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127 / 452 page ![]() S12CPUV2 Reference Manual, Rev. 4.0 Freescale Semiconductor 127 Operation: (A) • (M) Description: Performs bitwise logical AND on the content of accumulator A and the content of memory location M and modifies the condition codes accordingly. Each bit of the result is the logical AND of the corresponding bits of the accumulator and the memory location. Neither the content of the accumulator nor the content of the memory location is affected. BITA Bit Test A BITA CCR Details: S X HIN Z V C –––– ∆∆ 0 – N: Set if MSB of result is set; cleared otherwise Z: Set if result is $00; cleared otherwise V: 0; cleared Source Form Address Mode Object Code Access Detail HCS12 M68HC12 BITA #opr8i BITA opr8a BITA opr16a BITA oprx0_xysp BITA oprx9,xysp BITA oprx16,xysp BITA [D,xysp] BITA [oprx16,xysp] IMM DIR EXT IDX IDX1 IDX2 [D,IDX] [IDX2] 85 ii 95 dd B5 hh ll A5 xb A5 xb ff A5 xb ee ff A5 xb A5 xb ee ff P rPf rPO rPf rPO frPP fIfrPf fIPrPf P rfP rOP rfP rPO frPP fIfrfP fIPrfP |
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