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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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MC68HC705P9CS 数据表(PDF) 35 Page - Freescale Semiconductor, Inc |
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MC68HC705P9CS 数据表(HTML) 35 Page - Freescale Semiconductor, Inc |
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35 / 160 page  Memory Input/Output Register Summary MC68HC705P9 — Rev. 4.0 Technical Data MOTOROLA Memory 35 $0015 Input Capture Register Low (ICRL) See page 114. Read: Bit 7 6543 21 Bit 0 Write: Reset: Unaffected by reset $0016 Output Compare Register High (OCRH) See page 115. Read: Bit 15 14 13 12 11 10 9 Bit 8 Write: Reset: Unaffected by reset $0017 Output Compare Register Low (OCRL) See page 115. Read: Bit 7 6543 21 Bit 0 Write: Reset: Unaffected by reset $0018 Timer Register High (TRH) See page 112. Read: Bit 15 14 13 12 11 10 9 Bit 8 Write: Reset: Reset initializes TRH to $FF $0019 Timer Register Low (TRL) See page 112. Read: Bit 7 6543 21 Bit 0 Write: Reset: Reset initializes TRL to $FC $001A Alternate Timer Register High (ATRH) See page 113. Read: Bit 15 14 13 12 11 10 9 Bit 8 Write: Reset: Reset initializes ATRH to $FF $001B Alternate Timer Register Low (ATRL) See page 113. Read: Bit 7 6543 21 Bit 0 Write: Reset: Reset initializes ATRL to $FC $001C EPROM Programming Register (EPROG) See page 38. Read: 00000 LATCH 0 EPGM Write: RRRR R R Reset: Unaffected by reset Addr. Name Bit 7 6543 21 Bit 0 = Unimplemented R = Reserved U = Unaffected Figure 3-2. I/O Register Summary (Sheet 3 of 4) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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