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MC68HC705P9CS 数据表(PDF) 59 Page - Freescale Semiconductor, Inc |
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MC68HC705P9CS 数据表(HTML) 59 Page - Freescale Semiconductor, Inc |
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59 / 160 page  Central Processor Unit (CPU) Instruction Set MC68HC705P9 — Rev. 4.0 Technical Data MOTOROLA Central Processor Unit (CPU) 59 BIL rel Branch if IRQ Pin Low PC ← (PC) + 2 + rel ? IRQ = 0 —— —— — REL 2E rr 3 BIT #opr BIT opr BIT opr BIT opr,X BIT opr,X BIT ,X Bit Test Accumulator with Memory Byte (A) ∧ (M) —— — IMM DIR EXT IX2 IX1 IX A5 B5 C5 D5 E5 F5 ii dd hh ll ee ff ff 2 3 4 5 4 3 BLO rel Branch if Lower (Same as BCS) PC ← (PC) + 2 + rel ? C = 1 —— —— — REL 25 rr 3 BLS rel Branch if Lower or Same PC ← (PC) + 2 + rel ? C ∨ Z = 1 —— —— — REL 23 rr 3 BMC rel Branch if Interrupt Mask Clear PC ← (PC) + 2 + rel ? I = 0 —— —— — REL 2C rr 3 BMI rel Branch if Minus PC ← (PC) + 2 + rel ? N = 1 —— —— — REL 2B rr 3 BMS rel Branch if Interrupt Mask Set PC ← (PC) + 2 + rel ? I = 1 —— —— — REL 2D rr 3 BNE rel Branch if Not Equal PC ← (PC) + 2 + rel ? Z = 0 —— —— — REL 26 rr 3 BPL rel Branch if Plus PC ← (PC) + 2 + rel ? N = 0 —— —— — REL 2A rr 3 BRA rel Branch Always PC ← (PC) + 2 + rel ? 1 = 1 —— —— — REL 20 rr 3 BRCLR n opr rel Branch if Bit n Clear PC ← (PC) + 2 + rel ? Mn = 0 —— —— DIR (b0) DIR (b1) DIR (b2) DIR (b3) DIR (b4) DIR (b5) DIR (b6) DIR (b7) 01 03 05 07 09 0B 0D 0F dd rr dd rr dd rr dd rr dd rr dd rr dd rr dd rr 5 5 5 5 5 5 5 5 BRN rel Branch Never PC ← (PC) + 2 + rel ? 1 = 0 —— —— — REL 21 rr 3 BRSET n opr rel Branch if Bit n Set PC ← (PC) + 2 + rel ? Mn = 1 —— —— DIR (b0) DIR (b1) DIR (b2) DIR (b3) DIR (b4) DIR (b5) DIR (b6) DIR (b7) 00 02 04 06 08 0A 0C 0E dd rr dd rr dd rr dd rr dd rr dd rr dd rr dd rr 5 5 5 5 5 5 5 5 BSET n opr Set Bit n Mn ← 1 —— —— — DIR (b0) DIR (b1) DIR (b2) DIR (b3) DIR (b4) DIR (b5) DIR (b6) DIR (b7) 10 12 14 16 18 1A 1C 1E dd dd dd dd dd dd dd dd 5 5 5 5 5 5 5 5 BSR rel Branch to Subroutine PC ← (PC) + 2; push (PCL) SP ← (SP) – 1; push (PCH) SP ← (SP) – 1 PC ← (PC) + rel —— —— — REL AD rr 6 CLC Clear Carry Bit C ← 0 —— —— 0INH 98 2 CLI Clear Interrupt Mask I ← 0 — 0 —— — INH 9A 2 Table 4-6. Instruction Set Summary (Sheet 2 of 6) Source Form Operation Description Effect on CCR HI N Z C Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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