MC68HC705P9CS datasheet(89/160 Pages) FREESCALE

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Parallel Input/Output (I/O) Ports

Port C

MC68HC705P9 — Rev. 4.0

Technical Data

MOTOROLA

Parallel Input/Output (I/O) Ports

7.5.2 Data Direction Register C (DDRC)

Data direction register C determines whether each port C pin is an input

or an output.

DDRC[7:0] — Data Direction Register C Bits

These read/write bits control port C data direction. Reset clears

DDRC[7:0], configuring all port C pins as inputs.

1 = Corresponding port C pin configured as output

0 = Corresponding port C pin configured as input

NOTE:

Avoid glitches on port C pins by writing to the port C data register before

changing data direction register C bits from 0 to 1.

Writing to bits DDRC7–DDRC3 while the ADC is on can produce

unpredictable ADC results.

Figure 7-10 shows the I/O logic of port C.

Figure 7-10. Port C I/O Logic

$0006

Bit 7

54321

Bit 0

Read:

DDRC7

DDRC6

DDRC5

DDRC4

DDRC3

DDRC2

DDRC1

DDRC0

Write:

Reset:

000000

Figure 7-9. Data Direction Register C (DDRC)

READ DATA DIRECTION REGISTER C ($0006)

WRITE DATA DIRECTION REGISTER C ($0006)

RESET

WRITE PORT C DATA REGISTER ($0002)

READ PORT C DATA REGISTER ($0002)

PCx

DDRCx

Freescale Semiconductor, Inc.

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