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MC68HC705P9CS 数据表(PDF) 62 Page - Freescale Semiconductor, Inc |
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MC68HC705P9CS 数据表(HTML) 62 Page - Freescale Semiconductor, Inc |
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62 / 160 page  Central Processor Unit (CPU) Technical Data MC68HC705P9 — Rev. 4.0 62 Central Processor Unit (CPU) MOTOROLA ROR opr RORA RORX ROR opr,X ROR ,X Rotate Byte Right through Carry Bit —— DIR INH INH IX1 IX 36 46 56 66 76 dd ff 5 3 3 6 5 RSP Reset Stack Pointer SP ← $00FF —— —— — INH 9C 2 RTI Return from Interrupt SP ← (SP) + 1; Pull (CCR) SP ← (SP) + 1; Pull (A) SP ← (SP) + 1; Pull (X) SP ← (SP) + 1; Pull (PCH) SP ← (SP) + 1; Pull (PCL) INH 80 9 RTS Return from Subroutine SP ← (SP) + 1; Pull (PCH) SP ← (SP) + 1; Pull (PCL) —— —— — INH 81 6 SBC #opr SBC opr SBC opr SBC opr,X SBC opr,X SBC ,X Subtract Memory Byte and Carry Bit from Accumulator A ← (A) – (M) – (C) —— IMM DIR EXT IX2 IX1 IX A2 B2 C2 D2 E2 F2 ii dd hh ll ee ff ff 2 3 4 5 4 3 SEC Set Carry Bit C ← 1 —— —— 1INH 99 2 SEI Set Interrupt Mask I ← 1 — 1 —— — INH 9B 2 STA opr STA opr STA opr,X STA opr,X STA ,X Store Accumulator in Memory M ← (A) —— — DIR EXT IX2 IX1 IX B7 C7 D7 E7 F7 dd hh ll ee ff ff 4 5 6 5 4 STOP Stop Oscillator and Enable IRQ Pin — 0 —— — INH 8E 2 STX opr STX opr STX opr,X STX opr,X STX ,X Store Index Register In Memory M ← (X) —— — DIR EXT IX2 IX1 IX BF CF DF EF FF dd hh ll ee ff ff 4 5 6 5 4 SUB #opr SUB opr SUB opr SUB opr,X SUB opr,X SUB ,X Subtract Memory Byte from Accumulator A ← (A) – (M) —— IMM DIR EXT IX2 IX1 IX A0 B0 C0 D0 E0 F0 ii dd hh ll ee ff ff 2 3 4 5 4 3 SWI Software Interrupt PC ← (PC) + 1; Push (PCL) SP ← (SP) – 1; Push (PCH) SP ← (SP) – 1; Push (X) SP ← (SP) – 1; Push (A) SP ← (SP) – 1; Push (CCR) SP ← (SP) – 1; I ← 1 PCH ← Interrupt Vector High Byte PCL ← Interrupt Vector Low Byte — 1 —— — INH 83 10 Table 4-6. Instruction Set Summary (Sheet 5 of 6) Source Form Operation Description Effect on CCR HI N Z C b0 b7 C Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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