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MC68HC705P9CS 数据表(PDF) 91 Page - Freescale Semiconductor, Inc |
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MC68HC705P9CS 数据表(HTML) 91 Page - Freescale Semiconductor, Inc |
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91 / 160 page  Parallel Input/Output (I/O) Ports Port D MC68HC705P9 — Rev. 4.0 Technical Data MOTOROLA Parallel Input/Output (I/O) Ports 91 7.6.1 Port D Data Register (PORTD) The port D data register contains a latch for each of the two port D pins. PD7 and PD5 — Port D Data Bits These read/write bits are software programmable. Data direction of each port D pin is under the control of the corresponding bit in data direction register D. Reset has no effect on port D data. TCAP — Timer Capture TCAP is the input capture pin for the timer. $0003 Bit 7 6 54321 Bit 0 Read: PD7 0 PD5 10000 Write: Reset: Unaffected by reset Alternate Function: TCAP = Unimplemented Figure 7-11. Port D Data Register (PORTD) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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