MC68HC705P9CS datasheet(76/160 Pages) FREESCALE

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Low Power Modes

Technical Data

MC68HC705P9 — Rev. 4.0

Low Power Modes

MOTOROLA

When the MCU exits stop mode, processing resumes after a

stabilization delay of 4064 oscillator cycles.

An active edge on the PD7/TCAP pin during stop mode sets the ICF flag

when an external interrupt brings the MCU out of stop mode. An external

interrupt also latches the value in the timer registers into the input

capture registers.

If a reset brings the MCU out of stop mode, then an active edge on the

PD7/TCAP pin during stop mode has no effect on the ICF flag or the

input capture registers.

See Figure 6-1 for stop recovery timing information.

Figure 6-1. Stop Recovery Timing

ILIH

4064 t

CYC

OSC

RESET

IRQ/V

INTERNAL

CLOCK

INTERNAL

ADDRESS

Notes:

1. Internal clocking from OSC1 pin

2. Edge-triggered external interrupt mask option

3. Edge- and level-triggered external interrupt mask option

4. Reset vector shown as example

RESET OR INTERRUPT

VECTOR FETCH

1FFE

1FFF

(NOTE 4)

BUS

(NOTE 3)

(NOTE 2)

(NOTE 1)

Freescale Semiconductor, Inc.

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