MC68HC705P9CS datasheet(36/160 Pages) FREESCALE

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Memory

Technical Data

MC68HC705P9 — Rev. 4.0

Memory

MOTOROLA

3.5 RAM

The 128 addresses from $0080–$00FF are RAM locations. The CPU

uses the top 64 RAM addresses, $00C0–$00FF, as the stack. Before

processing an interrupt, the CPU uses five bytes of the stack to save the

contents of the CPU registers. During a subroutine call, the CPU uses

two bytes of the stack to store the return address. The stack pointer

decrements when the CPU stores a byte on the stack and increments

when the CPU retrieves a byte from the stack.

NOTE:

Be careful when using nested subroutines or multiple interrupt levels.

The CPU may overwrite data in the RAM during a subroutine or during

the interrupt stacking operation.

$001D

ADC Data Register

(ADDR)

See page 136.

Read:

Bit 7

6543

Bit 0

Write:

Reset:

Unaffected by reset

$001E

ADC Status/Control Register

(ADSCR)

See page 134.

Read:

CCF

ADRC

ADON

CH2

CH1

CH0

Write:

Reset:

00000

000

$001F

Reserved Read:

RRRR

$0900

Mask Option Register

(MOR)

See page 42.

Read:

00000

SIOP

IRQ

COPE

Write:

Reset:

Unaffected by reset

$1FF0

COP Register

(COPR)

See page 97.

Read:

RRRR

RRR

COPC

Write:

Reset:

Unaffected by reset

Addr.

Name

Bit 7

6543

Bit 0

= Unimplemented

R = Reserved

U = Unaffected

Figure 3-2. I/O Register Summary (Sheet 4 of 4)

Freescale Semiconductor, Inc.

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