MC68HC705P9CS datasheet(50/160 Pages) FREESCALE

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Central Processor Unit (CPU)

Technical Data

MC68HC705P9 — Rev. 4.0

Central Processor Unit (CPU)

MOTOROLA

4.7.1 Addressing Modes

The CPU uses eight addressing modes for flexibility in accessing data.

The addressing modes provide eight different ways for the CPU to find

the data required to execute an instruction. The eight addressing modes

are:

•

Inherent

•

Immediate

•

Direct

•

Extended

•

Indexed, no offset

•

Indexed, 8-bit offset

•

Indexed, 16-bit offset

•

Relative

4.7.1.1 Inherent

Inherent instructions are those that have no operand, such as return

from interrupt (RTI) and stop (STOP). Some of the inherent instructions

act on data in the CPU registers, such as set carry flag (SEC) and

increment accumulator (INCA). Inherent instructions require no operand

address and are one byte long.

4.7.1.2 Immediate

Immediate instructions are those that contain a value to be used in an

operation with the value in the accumulator or index register. Immediate

instructions require no operand address and are two bytes long. The

opcode is the first byte, and the immediate data value is the second byte.

4.7.1.3 Direct

Direct instructions can access any of the first 256 memory locations with

two bytes. The first byte is the opcode, and the second is the low byte of

the operand address. In direct addressing, the CPU automatically uses

$00 as the high byte of the operand address.

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