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PPC8567CVTAQGGA 数据表(PDF) 56 Page - Freescale Semiconductor, Inc |
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PPC8567CVTAQGGA 数据表(HTML) 56 Page - Freescale Semiconductor, Inc |
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56 / 139 page ![]() MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1 56 Freescale Semiconductor I 2C Figure 33 provides the boundary-scan timing diagram. Figure 33. Boundary-Scan Timing Diagram 11 I2C This section describes the DC and AC electrical characteristics for the I2C interfaces of the MPC8568E. Note that I2C2 is multiplexed with QE Port C. PC[18] IIC2_SCL PC[19] IIC2_SDA 11.1 I2C DC Electrical Characteristics Table 46 provides the DC electrical characteristics for the I2C interfaces. Table 46. I2C DC Electrical Characteristics At recommended operating conditions with OVDD of 3.3 V ± 5%. Parameter Symbol Min Max Unit Notes Input high voltage level VIH 0.7 × OVDD OVDD +0.3 V — Input low voltage level VIL –0.3 0.3 × OVDD V— Low level output voltage VOL 00.4 V 1 Pulse width of spikes which must be suppressed by the input filter tI2KHKL 050 ns 2 Input current each I/O pin (input voltage is between 0.1 × OVDD and 0.9 × OVDD(max) II –10 10 μA3 VM = Midpoint Voltage (OVDD/2) VM VM tJTDVKH tJTDXKH Boundary Data Outputs Boundary Data Outputs JTAG External Clock Boundary Data Inputs Output Data Valid tJTKLDX tJTKLDZ tJTKLDV Input Data Valid Output Data Valid |
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