PPC8567CVTAQGGA datasheet(71/139 Pages) FREESCALE

71 / 139 page

MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1

Freescale Semiconductor

PCI Express

14.3

Clocking Dependencies

The ports on the two ends of a link must transmit data at a rate that is within 600 parts per million (ppm)

of each other at all times. This is specified to allow bit rate clock sources with a +/– 300 ppm tolerance.

14.4

Physical Layer Specifications

The following is a summary of the specifications for the physical layer of PCI Express on this device. For

further details as well as the specifications of the Transport and Data Link layer please use the PCI

EXPRESS Base Specification. REV. 1.0a document.

14.4.1

Differential Transmitter (TX) Output

Table 51 defines the specifications for the differential output at all transmitters (TXs). The parameters are

specified at the component pins.

tREFPJ

Phase jitter. Deviation in edge location with respect to mean

edge location

–50

—

Notes:

1. Typical based on PCI Express Specification 2.0.

Table 51. Differential Transmitter (TX) Output Specifications

Symbol

Parameter

Min

Nom

Max

Units

Comments

Unit Interval

399.88

400

400.12

Each UI is 400 ps ± 300 ppm. UI does not account for

Spread Spectrum Clock dictated variations. See Note 1.

VTX-DIFFp-p

Differential

Peak-to-Peak

Output Voltage

0.8

—

1.2

VTX-DIFFp-p = 2*|VTX-D+ – VTX-D-| See Note 2.

VTX-DE-RATIO

De- Emphasized

Differential

Output Voltage

(Ratio)

–3.0

–3.5

–4.0

Ratio of the VTX-DIFFp-p of the second and following bits

after a transition divided by the VTX-DIFFp-p of the first bit

after a transition. See Note 2.

TTX-EYE

Minimum TX Eye

Width

0.70

—

The maximum Transmitter jitter can be derived as

TTX-MAX-JITTER = 1 – TTX-EYE= 0.3 UI.

See Notes 2 and 3.

TTX-EYE-MEDIAN-to-

MAX-JITTER

Maximum time

between the jitter

median and

maximum

deviation from

the median.

—

0.15

Jitter is defined as the measurement variation of the

crossing points (VTX-DIFFp-p = 0 V) in relation to a

recovered TX UI. A recovered TX UI is calculated over

3500 consecutive unit intervals of sample data. Jitter is

measured using all edges of the 250 consecutive UI in

the center of the 3500 UI used for calculating the TX UI.

See Notes 2 and 3.

TTX-RISE, TTX-FALL

D+/D- TX Output

Rise/Fall Time

0.125

—

See Notes 2 and 5

Table 50. SD_REF_CLK and SD_REF_CLK AC Requirements

Symbol

Parameter Description

Min

Typical

Max

Units

Notes

PPC8567CVTAQGGA 数据表(PDF) 71 Page - Freescale Semiconductor, Inc

PPC8567CVTAQGGA 数据表(HTML) 71 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载