PPC8567CVTAQGGA datasheet(74/139 Pages) FREESCALE

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MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1

Freescale Semiconductor

PCI Express

A recovered TX UI is calculated over 3500 consecutive unit intervals of sample data. The eye diagram is

created using all edges of the 250 consecutive UI in the center of the 3500 UI used for calculating the TX

UI.

NOTE

It is recommended that the recovered TX UI is calculated using all edges in

the 3500 consecutive UI interval with a fit algorithm using a minimization

merit function (that is, least squares and median deviation fits).

Figure 49. Minimum Transmitter Timing and Voltage Output Compliance Specifications

14.4.3

Differential Receiver (RX) Input Specifications

Table 52 defines the specifications for the differential input at all receivers (RXs). The parameters are

specified at the component pins.

Table 52. Differential Receiver (RX) Input Specifications

Symbol

Parameter

Min

Nom

Max

Units

Comments

Unit Interval

399.8

400

400.12

Each UI is 400 ps ± 300 ppm. UI does not

account for Spread Spectrum Clock dictated

variations. See Note 1.

VRX-DIFFp-p

Differential

Peak-to-Peak

Output Voltage

0.175

—

1.200

VRX-DIFFp-p = 2*|VRX-D+ – VRX-D-|

See Note 2.

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