PPC8567CVTAQGGA datasheet(86/139 Pages) FREESCALE

数据搜索系统，热门电子元器件搜索

PPC8567CVTAQGGA 数据表(PDF) 86 Page - Freescale Semiconductor, Inc

部件名	PPC8567CVTAQGGA

功能描述	MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications

PDF	139 Pages

Scroll/Zoom	100%

制造商	FREESCALE [Freescale Semiconductor, Inc]

网页	http://www.freescale.com

标志

86 / 139 page

MPC8568E/MPC8567E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 1

Freescale Semiconductor

Serial RapidIO

Figure 54. Single Frequency Sinusoidal Jitter Limits

15.8

Receiver Eye Diagrams

For each baud rate at which an LP-Serial receiver is specified to operate, the receiver shall meet the

corresponding Bit Error Rate specification (Table 61, Table 62, Table 63) when the eye pattern of the

receiver test signal (exclusive of sinusoidal jitter) falls entirely within the unshaded portion of the Receiver

Input Compliance Mask shown in Figure 55 with the parameters specified in Table . The eye pattern of the

receiver test signal is measured at the input pins of the receiving device with the device replaced with a

100

Ω +/– 5% differential resistive load.

8.5 UI p-p

0.10 UI p-p

Sinusoidal

Jitter

Amplitude

22.1 kHz

1.875 MHz

20 MHz

Frequency

ALLDATASHEET是否为您带来帮助? [ DONATE ]
关于 Alldatasheet \| 广告服务 \| 联系我们 \| 隐私政策 \| 数据表链接 \| 链接交换 \| 制造商名单 All Rights Reserved©Alldatasheet.com
Mirror Sites English : Alldatasheet.com \| English : Alldatasheet.net \| Chinese : Alldatasheetcn.com \| German : Alldatasheetde.com \| Japanese : Alldatasheet.jp Russian : Alldatasheetru.com \| Korean : Alldatasheet.co.kr \| Spanish : Alldatasheet.es \| French : Alldatasheet.fr \| Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com \| Polish : Alldatasheet.pl \| Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in \| Mexican : Alldatasheet.com.mx \| British : Alldatasheet.co.uk \| New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com \| icmetro.com

ALLDATASHEET是否为您带来帮助? [ DONATE ]

Family Site : ic2ic.com | icmetro.com