 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
MPC8544E 数据表(PDF) 34 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MPC8544E 数据表(HTML) 34 Page - Freescale Semiconductor, Inc |
|
|
34 / 117 page  MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5 34 Freescale Semiconductor Enhanced Three-Speed Ethernet (eTSEC), MII Management 8.6.1 MII Transmit AC Timing Specifications Table 32 provides the MII transmit AC timing specifications. Figure 16 shows the MII transmit AC timing diagram. Figure 16. MII Transmit AC Timing Diagram 8.6.2 MII Receive AC Timing Specifications Table 33 provides the MII receive AC timing specifications. Table 32. MII Transmit AC Timing Specifications At recommended operating conditions with L/TVDD of 3.3 V ± 5% or 2.5 V ± 5% Parameter/Condition Symbol1 Min Typ Max Unit Notes TX_CLK clock period 10 Mbps tMTX —400 — ns — TX_CLK clock period 100 Mbps tMTX —40— ns — TX_CLK duty cycle tMTXH/tMTX 35 — 65 % — TX_CLK to MII data TXD[3:0], TX_ER, TX_EN delay tMTKHDX 1 5 15 ns — TX_CLK data clock rise (20%–80%) tMTXR 1.0 — 4.0 ns — TX_CLK data clock fall (80%–20%) tMTXF 1.0 — 4.0 ns — Note: 1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tMTKHDX symbolizes MII transmit timing (MT) for the time tMTX clock reference (K) going high (H) until data outputs (D) are invalid (X). Note that, in general, the clock reference symbol representation is based on two to three letters representing the clock of a particular functional. For example, the subscript of tMTX represents the MII(M) transmit (TX) clock. For rise and fall times, the latter convention is used with the appropriate letter: R (rise) or F (fall). Table 33. MII Receive AC Timing Specifications At recommended operating conditions with L/TVDD of 3.3 V ± 5%.or 2.5 V ± 5%. Parameter/Condition Symbol1 Min Typ Max Unit Notes RX_CLK clock period 10 Mbps tMRX —400 — ns — RX_CLK clock period 100 Mbps tMRX —40— ns — RX_CLK duty cycle tMRXH/tMRX 35 — 65 % — TX_CLK TXD[3:0] tMTKHDX tMTX tMTXH tMTXR tMTXF TX_EN TX_ER |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
