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MPC8544E 数据表(PDF) 63 Page - Freescale Semiconductor, Inc

部件名 MPC8544E
功能描述  MPC8544E PowerQUICC III Integrated Processor Hardware Specifications
PDF  117 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

MPC8544E 数据表(HTML) 63 Page - Freescale Semiconductor, Inc

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MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Freescale Semiconductor
63
High-Speed Serial Interfaces (HSSI)
Figure 42 shows the PCI input AC timing conditions.
Figure 42. PCI Input AC Timing Measurement Conditions
Figure 43 shows the PCI output AC timing conditions.
Figure 43. PCI Output AC Timing Measurement Condition
16 High-Speed Serial Interfaces (HSSI)
The MPC8544E features two serializer/deserializer (SerDes) interfaces to be used for high-speed serial
interconnect applications.The SerDes1 dedicated for PCI Express data transfers. The SerDes2 can be used
for PCI Express and/or SGMII application. This section describes the common portion of SerDes DC
electrical specifications, which is the DC requirement for SerDes Reference Clocks. The SerDes data
lane’s transmitter and receiver reference circuits are also shown.
16.1
Signal Terms Definition
The SerDes utilizes differential signaling to transfer data across the serial link. This section defines terms
used in the description and specification of differential signals.
Figure 44 shows how the signals are defined. For illustration purpose, only one SerDes lane is used for
description. The figure shows waveform for either a transmitter output (SDn_TX and SDn_TX) or a
receiver input (SDn_RX and SDn_RX). Each signal swings between A Volts and B Volts where A > B.
tPCIVKH
CLK
Input
tPCIXKH
CLK
Output Delay
tPCKHOV
High-Impedance
tPCKHOZ
Output



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