ST7LITE20F2 datasheet(104/166 Pages) STMICROELECTRONICS

104 / 166 page

On-chip peripherals

ST7LITE20F2 ST7LITE25F2 ST7LITE29F2

104/166

Doc ID 8349 Rev 5

11.5.2

Main features

●

10-bit conversion

●

Up to 7 channels with multiplexed input

●

Linear successive approximation

●

Data register (DR) which contains the results

●

Conversion complete status flag

●

On/off bit (to reduce consumption)

The block diagram is shown in Figure 49.

11.5.3

Functional description

Analog power supply

VDDA and VSSA are the high and low level reference voltage pins. In some devices (refer to

device pin out description) they are internally connected to the VDD and VSS pins.

Conversion accuracy may therefore be impacted by voltage drops and noise in the event of

heavily loaded or badly decoupled power supply lines.

Figure 49. ADC block diagram

Input voltage amplifier

The input voltage can be amplified by a factor of 8 by enabling the AMPSEL bit in the

ADCDRL register.

When the amplifier is enabled, the input range is 0 V to VDD/8.

CH2

CH1

EOC SPEED ADON

CH0

ADCCSR

AIN0

AIN1

ANALOG TO DIGITAL

CONVERTER

AINx

ANALOG

MUX

ADCDRH

ADCDRL

AMP

SLOW

AMP

RADC

CADC

HOLD CONTROL

x 1 or

x 8

AMPSEL

bit

SEL

fADC

fCPU

DIV 2

DIV 4

SLOW

bit

CAL

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