ST7LITE20F2 datasheet(105/166 Pages) STMICROELECTRONICS

105 / 166 page

ST7LITE20F2 ST7LITE25F2 ST7LITE29F2

On-chip peripherals

Doc ID 8349 Rev 5

105/166

For example, if VDD = 5 V, then the ADC can convert voltages in the range 0 V to 430 mV

with an ideal resolution of 0.6 mV (equivalent to 13-bit resolution with reference to a VSS to

VDD range).

Note:

For more details, refer to Section 13: Electrical characteristics.

The amplifier is switched on by the ADON bit in the ADCCSR register, so no additional

startup time is required when the amplifier is selected by the AMPSEL bit.

Digital A/D conversion result

The conversion is monotonic, meaning that the result never decreases if the analog input

does not and never increases if the analog input does not.

If the input voltage (VAIN) is greater than VDDA (high-level voltage reference) then the

conversion result is FFh in the ADCDRH register and 03h in the ADCDRL register (without

overflow indication).

If the input voltage (VAIN) is lower than VSSA (low-level voltage reference) then the

conversion result in the ADCDRH and ADCDRL registers is 00 00h.

The A/D converter is linear and the digital result of the conversion is stored in the ADCDRH

and ADCDRL registers. The accuracy of the conversion is described in Section 13:

Electrical characteristics.

RAIN is the maximum recommended impedance for an analog input signal. If the impedance

is too high, this will result in a loss of accuracy due to leakage and sampling not being

completed in the allowed time.

A/D Conversion

The analog input ports must be configured as input, no pull-up, no interrupt. Section 10: I/O

ports. Using these pins as analog inputs does not affect the ability of the port to be read as

a logic input.

In the ADCCSR register, select the CS[2:0] bits to assign the analog channel to convert.

ADC Conversion mode

●

In the ADCCSR register:

–

set the ADON bit to enable the A/D converter and to start the conversion. From

this time on, the ADC performs a continuous conversion of the selected channel.

●

When a conversion is complete:

–

the EOC bit is set by hardware.

–

the result is in the ADCDR registers.

A read to the ADCDRH resets the EOC bit.

To read the 10 bits, perform the following steps:

Poll EOC bit

Read ADCDRL

Read ADCDRH. This clears EOC automatically.

To read only 8 bits, perform the following steps:

Poll EOC bit

Read ADCDRH. This clears EOC automatically.

ST7LITE20F2 数据表(PDF) 105 Page - STMicroelectronics

ST7LITE20F2 数据表(HTML) 105 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载