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ADM1026JSTZ-R7 数据表(PDF) 14 Page - ON Semiconductor |
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ADM1026JSTZ-R7 数据表(HTML) 14 Page - ON Semiconductor |
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14 / 55 page ![]() ADM1026 http://onsemi.com 14 In the ADM1026, the write byte/word protocol is used for four purposes. The ADM1026 knows how to respond by the value of the command byte and EEPROM Register 3. The first purpose is to write a single byte of data to RAM. In this case, the command byte is the RAM address from 00h to 6Fh and the (only) data byte is the actual data. This is illustrated in Figure 19. Figure 19. Single Byte Write to RAM S SLAVE ADDRESS WA RAM ADDRESS (00h TO 6Fh) 12 3 4 5 6 A DATA AP 78 The protocol is also used to set up a 2-byte EEPROM address for a subsequent read or block read. In this case, the command byte is the high byte of the EEPROM address from 80h to 9Fh. The (only) data byte is the low byte of the EEPROM address. This is illustrated in Figure 20. Figure 20. Setting an EEPROM Address S SLAVE ADDRESS W EEPROM ADDRESS HIGH BYTE (80h TO 9Fh) 13 4 5 6 A A 7 A 2 P 8 EEPROM ADDRESS LOW BYTE (00h TO FFh) If it is required to read data from the EEPROM immediately after setting up the address, the master can assert a repeat start condition immediately after the final ACK and carry out a single-byte read or block read operation without asserting an intermediate stop condition. In this case, Bit 0 of EEPROM Register 3 should be set. The third use is to erase a page of EEPROM memory. EEPROM memory can be written to only if it is previously erased. Before writing to one or more EEPROM memory locations that are already programmed, the page or pages containing those locations must first be erased. EEPROM memory is erased by writing an EEPROM page address plus an arbitrary byte of data with Bit 2 of EEPROM Register 3 set to 1. Because the EEPROM consists of 128 pages of 64 bytes, the EEPROM page address consists of the EEPROM address high byte (from 80h to 9Fh) and the two MSBs of the low byte. The lower six bits of the EEPROM address (low byte only) specify addresses within a page and are ignored during an erase operation. Figure 21. EEPROM Page Erasure S SLAVE ADDRESS WA EEPROM ADDRESS HIGH BYTE (80h TO 9Fh) 12 3 4 5 6 A A ARBITRARY DATA 78 EEPROM ADDRESS LOW BYTE (00h TO FFh) 9 10 A Y Page erasure takes approximately 20 ms. If the EEPROM is accessed before erasure is complete, the ADM1026 responds with No Acknowledge. Last, this protocol is used to write a single byte of data to EEPROM. In this case, the command byte is the high byte of the EEPROM address from 80h to 9Fh. The first data byte is the low byte of the EEPROM address, and the second data byte is the actual data. Bit 1 of EEPROM Register 3 must be set. This is illustrated in Figure 22. Figure 22. Single-Byte Write to EEPROM S SLAVE ADDRESS WA EEPROM ADDRESS HIGH BYTE (80h TO 9Fh) 12 3 4 5 6 A A DATA 78 EEPROM ADDRESS LOW BYTE (00h TO FFh) AY 910 Block Write In this operation, the master device writes a block of data to a slave device. The start address for a block write must have been set previously. In the case of the ADM1026, this is done by a Send Byte operation to set a RAM address or by a write byte/word operation to set an EEPROM address. 1. The master device asserts a start condition on the SDA. 2. The master sends the 7-bit slave address followed by the write bit (low). 3. The addressed slave device asserts an ACK on the SDA. 4. The master sends a command code that tells the slave device to expect a block write. The ADM1026 command code for a block write is A0h (10100000). 5. The slave asserts an ACK on the SDA. 6. The master sends a data byte (20h) that tells the slave device that 32 data bytes are being sent to it. The master should always send 32 data bytes to the ADM1026. 7. The slave asserts an ACK on the SDA. 8. The master sends 32 data bytes. 9. The slave asserts an ACK on the SDA after each data byte. 10. The master sends a packet error checking (PEC) byte. 11. The ADM1026 checks the PEC byte and issues an ACK if correct. If incorrect (NACK), the master resends the data bytes. 12. The master asserts a stop condition on the SDA to end the transaction. Figure 23. Block Write to EEPROM or RAM S SLAVE ADDRESS WA COMMAND A0h BLOCK WRITE A A DATA 1 BYTE COUNT A AA P DATA 2 A DATA 32 PEC When performing a block write to EEPROM, Bit 1 of EEPROM Register 3 must be set. Unlike some EEPROM devices that limit block writes to within a page boundary, there is no limitation on the start address when performing a block write to EEPROM, except: There must be at least 32 locations from the start address to the highest EEPROM address (9FF) to avoid writing to invalid addresses. If the addresses cross a page boundary, both pages must be erased before programming. |
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