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ADM1026JSTZ-R7 数据表(PDF) 21 Page - ON Semiconductor |
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ADM1026JSTZ-R7 数据表(HTML) 21 Page - ON Semiconductor |
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21 / 55 page ![]() ADM1026 http://onsemi.com 21 Pins 28 and 27 are measured both as analog inputs AIN8/AIN9 and as remote temperature input D2+/D2−, irrespective of which configuration is selected for these pins. If Pins 28 and 27 are configured as AIN8/AIN9, the measurements for these channels are stored in Registers 27h and 29h, and the invalid temperature measurement is discarded. On the other hand, if Pins 28 and 27 are configured as D2+/D2−, the temperature measurement is stored in Register 29h, and there is no valid result in Register 27h. As mentioned previously, the ADC performs a conversion every 711 ms on the analog and local temperature inputs and every 2.13 ms on the remote temperature inputs. Each input is measured 16 times and averaged to reduce noise. The total monitoring cycle time for voltage and temperature inputs is therefore nominally: (eq. 11) (18 16 0.711) ) (2 16 2.13) + 273 ms The ADC uses the internal 22.5 kHz clock, which has a tolerance of 6%, so the worst-case monitoring cycle time is 290 ms. The fan speed measurement uses a completely separate monitoring loop, as described later. Input Safety Scaling of the analog inputs is performed on-chip, so external attenuators are typically not required. However, because the power supply voltages appear directly at the pins, it is advisable to add small external resistors (that is, 500 W) in series with the supply traces to the chip to prevent damaging the traces or power supplies should an accidental short such as a probe connect two power supplies together. Because the resistors form part of the input attenuators, they affect the accuracy of the analog measurement if their value is too high. The worst such accident would be connecting −12 V to +12 V where there is a total of 24 V difference. With the series resistors, this would draw a maximum current of approximately 24 mA. Analog Output The ADM1026 has a single analog output from an unsigned 8-bit DAC that produces 0 V to 2.5 V (independent of the reference voltage setting). The input data for this DAC is contained in the DAC control register (Address 04h). The DAC control register defaults to FFh during a power-on reset, which produces maximum fan speed. The analog output may be amplified and buffered with external circuitry such as an op amp and a transistor to provide fan speed control. During automatic fan speed control, described later, the four MSBs of this register set the minimum fan speed. Suitable fan drive circuits are shown in Figure 35 through Figure 39. When using any of these circuits, note the following: All of these circuits provide an output range from 0 V to almost +12 V, apart from Figure 35, which loses the base-emitter voltage drop of Q1 due to the emitter-follower configuration. To amplify the 2.5 V range of the analog output up to 12 V, the gain of these circuits needs to be about 4.8. Take care when choosing the op amp to ensure that its input common-mode range and output voltage swing are suitable. The op amp may be powered from the +12 V rail alone or from 12 V. If it is powered from +12 V, the input common-mode range should include ground to accommodate the minimum output voltage of the DAC, and the output voltage should swing below 0.6 V to ensure that the transistor can be turned fully off. If the op amp is powered from −12 V, precautions such as a clamp diode to ground may be needed to prevent the base-emitter junction of the output transistor being reverse-biased in the unlikely event that the output of the op amp should swing negative for any reason. In all these circuits, the output transistor must have an ICMAX greater than the maximum fan current, and be capable of dissipating power due to the voltage dropped across it when the fan is not operating at full speed. If the fan motor produces a large back EMF when switched off, it may be necessary to add clamp diodes to protect the output transistors in the event that the output goes from full scale to zero very quickly. Figure 35. Fan Drive Circuit with Op Amp and Emitter-follower Q1 2N2219A DAC R1 10k 1/4 LM324 12 V Figure 36. Fan Drive Circuit with Op Amp and PNP Transistor Q1 BD136 2SA968 DAC R1 10k 1/4 LM324 12 V R4 1kW R3 1kW R2 39kW |
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