ADM1026JSTZ-R7 datasheet(17/55 Pages) ONSEMI

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ADM1026

http://onsemi.com

Voltage Measurement Inputs

The internal structure for all the analog inputs is shown in

Figure 26. Each input circuit consists of an input protection

diode, an attenuator, plus a capacitor to form a first-order

low-pass filter that gives each voltage measurement input

immunity to high frequency noise. The −12 V input also has

a resistor connected to the on-chip reference to offset the

negative voltage range so that it is always positive and can

be handled by the ADC. This allows most popular power

supply voltages to be monitored directly by the ADM1026

without requiring any additional resistor scaling.

Figure 26. Voltage Measurement Inputs

109.4k

18.5pF

21.9k

+VCCP

9.3pF

VREF

17.5k

114.3k

–12V

49.5k

82.7k

4.5pF

VBAT

* SEE TEXT

AIN0 – AIN5

(0V – 3V)

109.4k

4.6pF

21.9k

AIN6 – AIN9

(0V – 2.5V)

4.6pF

52.5k

50k

4.6pF

83.5k

+5V

21k

9.3pF

113.5k

+12V

MUX

Setting Other Input Ranges

AIN0 to AIN9 can easily be scaled to voltages other than

2.5 V or 3.0 V. If the input voltage range is zero to some

positive voltage, all that is required is an input attenuator, as

shown in Figure 27.

Figure 27. Scaling AIN0 − AIN9

VIN

AIN(0–9)

However, when scaling AIN0 to AIN5, it should be noted

that these inputs already have an on-chip attenuator, because

their primary function is to monitor SCSI termination

voltages. This attenuator loads any external attenuator. The

input resistance of the on-chip attenuator can be between

100 k

W and 200 kW. For this tolerance not to affect the

accuracy, the output resistance of the external attenuator

should be very much lower than this, that is, 1 k

W in order

to add not more than 1% to the total unadjusted error (TUE).

Alternatively, the input can be buffered using an op amp.

(eq. 2)

R2 +

s *

3.0

for AIN0 through AIN5

(eq. 3)

R2 +

s *

2.5

for AIN6 through AIN9

Negative and bipolar input ranges can be accommodated

by using a positive reference voltage to offset the input

voltage range so that it is always positive. To monitor a

negative input voltage, an attenuator can be used as shown

in Figure 28.

Figure 28. Scaling and Offsetting AIN0 − AIN9

for Negative Inputs

VIN

AIN(0–9)

This offsets the negative voltage so that the ADC always

sees a positive voltage. R1 and R2 are chosen so that the

ADC input voltage is zero when the negative input voltage

is at its maximum (most negative) value, that is:

(eq. 4)

R2 +

s *

VOS

This is a simple and low cost solution, but note the

following:

 Because the input signal is offset but not inverted, the

input range is transposed. An increase in the magnitude

of the negative voltage (going more negative) causes the

input voltage to fall and give a lower output code from

the ADC. Conversely, a decrease in the magnitude of the

negative voltage causes the ADC code to increase. The

maximum negative voltage corresponds to zero output

from the ADC. This means that the upper and lower

limits are transposed.

 For the ADC output to be full scale when the negative

voltage is zero, VOS must be greater than the full−scale

voltage of the ADC, because VOS is attenuated by R1 and

R2. If VOS is equal to or less than the full−scale voltage

of the ADC, the input range is bipolar but not necessarily

symmetrical.

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