ADM1026JSTZ-R7 datasheet(37/55 Pages) ONSEMI

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ADM1026

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Detailed Register Descriptions

Table 14. REGISTER 00H, CONFIGURATION REGISTER 1 (POWER-ON DEFAULT 00H)

Bit

Name

R/W

Description

Monitor = 0

R/W

When this bit is set the ADM1026 monitors all voltage, temperature and fan

channels in a round robin manner.

Int Enable = 0

R/W

When this bit is set, the INT output pin is enabled.

Int Clear = 0

R/W

Setting this bit clears an interrupt from the voltage, temperature or fan speed

channels. Because GPIO interrupts are level triggered, this bit has no effect on

interrupts originating from GPIO channels. This bit is cleared by writing a 0 to it. If

in monitoring mode voltages, temperatures and fan speeds continue to be

monitored after writing to this bit to clear an interrupt, so an interrupt may be set

again on the next monitoring cycle.

Enable Voltage/Ext2 = 0

R/W

When this bit is 1, the ADM1026 monitors voltage (AIN8 and AIN9) on Pins 28

and 27, respectively. When this bit is 0, the ADM1026 monitors a second thermal

diode temperature channel, D2, on these pins. If the second thermal diode channel

is not being used, it is recommended that the bit be set to 1.

Enable THERM = 0

R/W

When this bit is 1, the THERM pin (Pin 42) is asserted (go low) if any of the

THERM limits are exceeded. If THERM is pulled low as an input, the DAC and

PWM outputs are forced to full scale until THERM is taken high.

Enable DAC AFC = 0

R/W

When this bit is 1, the DAC output is enabled for automatic fan speed control

(AFC) based on temperature. When this bit is 0, the DAC Output reflects the value

in Reg 04h, the DAC Control Register.

Enable PWM AFC = 0

R/W

When this bit is 1, the PWM output is enabled for automatic fan speed control

(AFC) based on temperature. When this bit is 0, the PWM Output reflects the value

in Reg 05h, the PWM Control Register.

Software Reset = 0

R/W

Writing a 1 to this bit restores all registers to the power-on defaults. This bit is

cleared by writing a 0 to it. For more info, see the Software Reset Function section.

Table 15. REGISTER 01H, CONFIGURATION REGISTER 2 (POWER-ON DEFAULT 00H)

Bit

Name

R/W

Description

Enable GPIO0/Fan0 = 0

R/W

When this bit is 1, Pin 3 is enabled as a general−purpose I/O pin (GPIO0),

otherwise it is a fan tach measurement input (Fan 0).

Enable GPIO1/Fan1 = 0

R/W

When this bit is 1, Pin 4 is enabled as a general−purpose I/O pin (GPIO1),

otherwise it is a fan tach measurement input (Fan 1).

Enable GPIO2/Fan2 = 0

R/W

When this bit is 1, Pin 5 is enabled as a general−purpose I/O pin (GPIO2),

otherwise it is a fan tach measurement input (Fan 2).

Enable GPIO3/Fan3 = 0

R/W

When this bit is 1, Pin 6 is enabled as a general−purpose I/O pin (GPIO3),

otherwise it is a fan tach measurement input (Fan 3).

Enable GPIO4/Fan4 = 0

R/W

When this bit is 1, Pin 9 is enabled as a general−purpose I/O pin (GPIO4),

otherwise it is a fan tach measurement input (Fan 4).

Enable GPIO5/Fan5 = 0

R/W

When this bit is 1, Pin 10 is enabled as a general−purpose I/O pin (GPIO5),

otherwise it is a fan tach measurement input (Fan 5).

Enable GPIO6/Fan6 = 0

R/W

When this bit is 1, Pin 11 is enabled as a general−purpose I/O pin (GPIO6),

otherwise it is a fan tach measurement input (Fan 6).

Enable GPIO7/Fan7 = 0

R/W

When this bit is 1, Pin 12 is enabled as a general−purpose I/O pin (GPIO7),

otherwise it is a fan tach measurement input (Fan 7).

ADM1026JSTZ-R7 数据表(PDF) 37 Page - ON Semiconductor

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