ADM1026JSTZ-R7 datasheet(24/55 Pages) ONSEMI

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ADM1026

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Figure 44. Fan with Tach Pullup to Voltage > VCC

(e.g. 12 V), Clamped with Zener Diode

12 V

FAN SPEED

COUNTER

FAN(0–7)

PULLUP

4.7k

TYP

VCC

* CHOOSE ZD1 VOLTAGE APPROXIMATELY 0.8 x VCC

If the fan has a strong pullup (less than 1 k

W) to +12 V, or

a totem pole output, a series resistor can be added to limit the

Zener current, as shown in Figure 45. Alternatively, a

resistive attenuator may be used, as shown in Figure 47.

R1 and R2 should be chosen such that:

(eq. 15)

2.0 V t VPULLUP

RPULLUP ) R1 ) R2

t 3.3 V STBY

Figure 45. Fan with Strong Tach Pullup to >VCC or

Totem Pole Output, Attenuated with R1/R2

12 V

FAN SPEED

COUNTER

FAN(0–7)

PULLUP TYP

<1 k

VCC

* CHOOSE ZD1 VOLTAGE APPROXIMATELY 0.8 x VCC

Figure 46. Fan with Strong Tach Pullup to > VCC or

Totem Pole Output, Clamped with Zener and Resistor

12 V

FAN SPEED

COUNTER

FAN(0–7)

<1 k

TACH

OUTPUT

VCC

R1*

* SEE TEXT

Fan Speed Measurement

The fan counter does not count the fan tach output pulses

directly because the fan speed may be less than 1000 RPM

and it would take several seconds to accumulate a

reasonably large and accurate count. Instead, the period of

the fan revolution is measured by gating an on-chip

22.5 kHz oscillator into the input of an 8-bit counter for two

periods of the fan tach output, as shown in Figure 47, so the

accumulated count is actually proportional to the fan tach

period and inversely proportional to the fan speed.

Figure 47. Fan Speed Measurement

22.5kHz

CLOCK

CONFIGURATION

REG. 1 BIT 0

FAN0

INPUT

FAN0

MEASUREMENT

PERIOD

FAN1

MEASUREMENT

PERIOD

START OF

MONITORING

CYCLE

The monitoring cycle begins when a 1 is written to the

monitor bit (Bit 0 of Configuration Register 1). The

INT_Enable (Bit 1) should be set to 1 to enable the INT

output.

The fan speed counter starts counting as soon as the fan

channel has been switched to. If the fan tach count reaches

0xFF, the fan has failed or is not connected. If a fan is

connected and running, the counter is reset on the second

tach rising edge, and oscillator pulses are actually counted

from the second rising tach edge to the fourth rising edge.

The measurement then switches to the next fan channel.

Here again, the counter begins counting and is reset on the

second tach rising edge, and oscillator pulses are counted

from the second rising edge to the fourth rising edge. This

is repeated for the other six fan channels.

Note that fan speed measurement does not occur until

1.8 seconds after the monitor bit has been set. This is to

allow the fans adequate time to spin up. Otherwise, the

ADM1026 could generate false fan failure interrupts.

During the 1.8 second fan spin-up time, all fan tach registers

read 0x00.

To accommodate fans of different speed and/or different

numbers of output pulses per revolution, a prescaler

(divisor) of 1, 2, 4, or 8 may be added before the counter.

Divisor values for Fans 0 to 3 are contained in the Fan 0–3

divisor register (Address 02h) and those for Fans 4 to 7 in the

Fan 4–7 divisor register (Address 03h). The default value

is 2, which gives a count of 153 for a fan running at

4400 RPM producing two output pulses per revolution. The

count is calculated by the equation:

(eq. 16)

Count + 22.5

103

RPM

Divisor

For constant-speed fans, fan failure is typically

considered to have occurred when the speed drops below

70% of nominal, corresponding to a count of 219. Full scale

(255) is reached if the fan speed fell to 60% of its nominal

value. For temperature-controlled, variable-speed fans, the

situation is different.

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