ADM1026JSTZ-R7 datasheet(27/55 Pages) ONSEMI

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ADM1026

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Figure 50. Other Interrupt Sources Can Reassert INT Immediately

START OF ANALOG

MONITORING CYCLE

OUT-OF-LIMIT

MEASUREMENT

LOCAL TEMPEREATURE

MEASUREMENT

START OF ANALOG

MONITORING CYCLE

LOCAL TEMPERATURE

MEASUREMENT

START OF ANALOG

MONITORING CYCLE

INT

CLEARED

INT RE−ASSERTED

NEW INT

FROM FAN

NEW INT

FROM GPIO

GPIO DE−ASSERTED

INT

CLEARED

Status Register 4 also stores inputs from two other

interrupt sources that operate in a different way from the

other status bits. If automatic fan speed control (AFC) is

enabled, Bit 4 of Status Register 4 is set whenever a fan starts

or stops. This bit causes a one-off INT output as shown in

Figure 51. It is cleared during the next monitoring cycle and

if INT has been cleared, it does not cause INT to be

reasserted.

Figure 51. Assertion of INT Due to AFC Event

INT

INT CLEARED BY STATUS REGULAR 1 READ, BIT 2

OF CONFIGURATION REGULAR 1 SET, OR ARA

FAN ON

FAN OFF

In a similar way, a change of state at the THERM output

(described in more detail later), sets Bit 3 of Status

state at the THERM output also causes Bit 0 of Status

channel caused the THERM event. This bit is reset during

the next monitoring cycle, provided the temperature channel

is within the normal high and low limits.

Fan Inputs

Fan inputs generate interrupts in a similar way to

analog/temperature inputs, but as the analog/temperature

inputs and fan inputs have different monitoring cycles, they

have separate interrupt circuits. As the speed of each fan is

measured, the output of the fan speed counter is stored in a

value register. The result is compared to the fan speed limit

and is used to set or clear a bit in Status Register 3. In this

case, the fan is monitored only for underspeed (fan counter

> fan speed limit). Mask Register 3 is used to mask fan

interrupts. After mask gating, the fan status bits are OR’ed

together and used to set a latch, whose output is OR’ed with

other interrupt sources to produce the INT output.

Like the analog/temp interrupt, an INT output caused by an

out−of−limit fan speed measurement, once cleared, is not

reasserted until the end of the next monitoring cycle, although

other interrupt sources may cause INT to be asserted.

GPIO and CI Pins. When GPIO pins are configured as

inputs, asserting a GPIO input (high or low, depending on

polarity) sets the corresponding GPIO status bit in Status

Registers 5 and 6, or Bit 7 of Status Register 4 (GPIO16). A

chassis intrusion event sets Bit 6 of Status Register 4.

The GPIO and CI status bits, after mask gating, are OR’ed

together and OR’ed with other interrupt sources to produce

the INT output. GPIO and CI interrupts are not latched and

cannot be cleared by normal interrupt clearing. They can

only be cleared by masking the status bits or by removing the

source of the interrupt.

Enabling and Clearing Interrupts

The INT output is enabled when Bit 1 of Configuration

low. INT may be cleared if:

 Status Register 1 is read. Ideally, if polling the status

registers trying to identify interrupt sources, Status

 The ADM1026 receives the alert response address

(ARA) (0001 100) over the SMBus.

 Bit 2 of Configuration Register 1 is set.

Bidirectional THERM Pin

The ADM1026 has a second interrupt pin (GPIO16/

THERM Pin 42) that responds only to critical thermal

events. The THERM pin goes low whenever a THERM limit

is exceeded. This function is useful for CPU throttling or

system shutdown. In addition, whenever THERM is

activated, the PWM and DAC outputs go full scale to

provide fail-safe system cooling. This output is enabled by

setting Bit 4 of Configuration Register 1 (Register 00h).

Whenever a THERM limit is exceeded, Bit 3 of Status

disabled (Bit 4 of Configuration Register 1 = 0). In this case,

the THERM status bit is set, but the PWM and DAC outputs

are not forced to full scale.

Three thermal limit registers are provided for the three

temperature sensors at Addresses 0Dh to 0Fh. These registers

are dedicated to the THERM function and none of the other

limit registers have any effect on the THERM output.

If any of the temperature measurements exceed the

corresponding limit, THERM is asserted (low) and the DAC

and PWM outputs go to maximum to drive any cooling fans

to full speed.

To avoid cooling fans cycling on and off continually when

the temperature is close to the limit, a fixed hysteresis of 5C

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