ADM1026JSTZ-R7 datasheet(25/55 Pages) ONSEMI

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ADM1026

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Table 9 shows the relationship between fan speed and time

per revolution at 60%, 70%, and 100% of nominal RPM for

fan speeds of 1100, 2200, 4400, and 8800 RPM, and the

divisor that would be used for each of these fans, based on

two tach pulses per revolution.

Limit Values

Fans generally do not over-speed if run from the correct

voltage, so the failure condition of interest is under speed

due to electrical or mechanical failure. For this reason, only

low speed limits are programmed into the limit registers for

the fans. It should be noted that because fan period rather

than speed is being measured, a fan failure interrupt occurs

when the measurement exceeds the limit value.

Fan Monitoring Cycle Time

The fan speeds are measured in sequence from 0 to 7. The

monitoring cycle time depends on the fan speed, the number

of tach output pulses per revolution, and the number of fans

being monitored.

If a fan is stopped or running so slowly that the fan speed

counter reaches 255 before the second tach pulse after

initialization or before the fourth tach pulse during

measurement, the measurement is terminated. This also

occurs if an input is configured as GPIO instead of fan. Any

channels connected in this manner time out after 255 clock

pulses.

The worst-case measurement time for a fan−configured

channel occurs when the counter reaches 254 from start to

the second tach pulse and reaches 255 after the second tach

pulse. Taking into account the tolerance of the oscillator

frequency, the worst-case measurement time is:

(eq. 17)

509

0.05 ms

where:

509 is the total number of clock pulses.

D is the divisor: 1, 2, 4, or 8.

0.05 ms is the worst-case oscillator period in ms.

The worst-case fan monitoring cycle time is the sum of the

worst-case measurement time for each fan.

Although the fan monitoring cycle and the analog input

monitoring cycle are started together, they are not

synchronized in any other way.

Table 9. FAN SPEEDS AND DIVISORS

Time Per

Divisor RPM

Nominal Rev

RPM (ms)

70% RPM

Rev 70% (ms)

60% RPM

Rev 60% (ms)

 1

8800

6.82

6160

9.74

5280

11.36

 2

4400

13.64

3080

19.48

2640

22.73

 4

2200

27.27

1540

38.96

1320

45.45

 8

1100

54.54

770

77.92

660

90.9

Chassis Intrusion Input

The chassis intrusion input is an active high input intended

for detection and signaling of unauthorized tampering with

the system. When this input goes high, the event is latched

in Bit 6 of Status Register 4, and an interrupt is generated.

The bit remains set until cleared by writing a 1 to CI clear,

Bit 1 of Configuration Register 3 (05h), as long as battery

voltage is connected to the VBAT input. The CI clear bit itself

is cleared by writing a 0 to it.

The CI input detects chassis intrusion events even when

the ADM1026 is powered off (provided battery voltage is

applied to VBAT) but does not immediately generate an

interrupt. Once a chassis intrusion event is detected and

latched, an interrupt is generated when the system is

powered on.

The actual detection of chassis intrusion is performed by

an external circuit that detects, for example, when the cover

has been removed. A wide variety of techniques may be used

for the detection, for example:

 A Microswitch that Opens or Closes when the Cover is

Removed

 A Reed Switch Operated by Magnet Fixed to the Cover

 A Hall-effect Switch Operated by Magnet Fixed to the

Cover

 A Phototransistor that Detects Light when the Cover is

Removed

The chassis intrusion input can also be used for other types

of alarm input. Figure 48 shows a temperature alarm circuit

using an AD22105 temperature switch sensor. This

produces a low-going output when the preset temperature is

exceeded, so the output is inverted by Q1 to make it

compatible with the CI input. Q1 can be almost any

small-signal NPN transistor, or a TTL or CMOS inverter

gate may be used if one is available.

Figure 48. Using the CI Input with a Temperature Sensor

VCC

RSET

AD22105

TEMPERATURE

SENSOR

10k

General-Purpose I/O Pins (Open Drain)

The ADM1026 has eight pins that are dedicated to

general-purpose logic input/output (Pins 1, 2, and 43 to 48),

eight pins that can be configured as general-purpose logic

pins or fan speed inputs (Pins 3 to 6, and 9 to 12), and one

pin that can be configured as GPIO16 or the bidirectional

THERM pin (Pin 42). The GPIO/FAN pins are configured

as general-purpose logic pins by setting Bits 0 to 7 of

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