ADM1026JSTZ-R7 datasheet(15/55 Pages) ONSEMI

15 / 55 page

ADM1026

http://onsemi.com

ADM1026 Read Operations

The ADM1026 uses the SMBus read protocols described

here.

Receive Byte

In this operation, the master device receives a single byte

from a slave device as follows:

1. The master device asserts a start condition on the

SDA.

2. The master sends the 7-bit slave address followed

by the read bit (high).

3. The addressed slave device asserts an ACK on the

SDA.

4. The master receives a data byte.

5. The master asserts a NO ACK on the SDA.

6. The master asserts a stop condition on the SDA to

end the transaction.

In the ADM1026, the receive byte protocol is used to read

a single byte of data from a RAM or EEPROM location

whose address has previously been set by a send byte or

write byte/word operation. Figure 24 shows this. When

reading from EEPROM, Bit 0 of EEPROM Register 3 must

be set.

Figure 24. Single-Byte Read from EEPROM or RAM

SLAVE

ADDRESS

RA DATA A P

5 6

Block Read

In this operation, the master device reads a block of data

from a slave device. The start address for a block read must

have been set previously. In the case of the ADM1026 this

is done by a send byte operation to set a RAM address, or by

a write byte/word operation to set an EEPROM address. The

block read operation consists of a send byte operation that

sends a block read command to the slave, immediately

followed by a repeated start and a read operation that reads

out multiple data bytes as follows:

1. The master device asserts a start condition on the

SDA.

2. The master sends the 7-bit slave address followed

by the write bit (low).

3. The addressed slave device asserts an ACK on the

SDA.

4. The master sends a command code that tells the

slave device to expect a block read. The

ADM1026 command code for a block read is A 1h

(10100001).

5. The slave asserts an ACK on the SDA.

6. The master asserts a repeat start condition on the

SDA.

7. The master sends the 7-bit slave address followed

by the read bit (high).

8. The slave asserts an ACK on the SDA.

9. The ADM1026 sends a byte count data byte that

tells the master how many data bytes to expect. The

ADM1026 always returns 32 data bytes (20h), the

maximum allowed by the SMBus 1.1 specification.

10. The master asserts an ACK on the SDA.

11. The master receives 32 data bytes.

12. The master asserts an ACK on the SDA after each

data byte.

13. The ADM1026 issues a PEC byte to the master.

The master should check the PEC byte and issue

another block read if the PEC byte is incorrect.

14. A NACK is generated after the PEC byte to signal

the end of the read.

15. The master asserts a stop condition on the SDA to

end the transaction.

Figure 25. Block Read from EEPROM or RAM

SLAVE

ADDRESS

COMMAND

A1h BLOCK

READ

DATA

PEC A

A BYTE

COUNT A DATA 1 A

SLAVE

ADDRESS

When block reading from EEPROM, Bit 0 of EEPROM

Note that although the ADM1026 supports Packet Error

Checking (PEC), its use is optional. The PEC byte is

calculated using CRC-8. The Frame Check Sequence (FCS)

conforms to CRC-8 by the polynomial:

(eq. 1)

C(x) + x8 ) x2 ) x ) 1

Consult the SMBus 1.1 Specification for more information.

Measurement Inputs

The ADM1026 has 17 external analog measurement pins

that can be configured to perform various functions. It also

measures two supply voltages, 3.3 V MAIN and 3.3 V

STBY, and the internal chip temperature.

Pins 25 and 26 are dedicated to remote temperature

measurement, while Pins 27 and 28 can be configured as

analog inputs with a range of 0 V to 2.5 V, or as inputs for

a second remote temperature sensor.

Pins 29 to 33 are dedicated to measuring VBAT, +5.0 V,

−12 V, +12 V supplies, and the processor core voltage VCCP.

The remaining analog inputs, Pins 34 to 41, are

general-purpose analog inputs with a range of 0 V to 2.5 V

(Pins 34 and 35) or 0 V to 3.0 V (Pins 36 to 41).

A-to-D Converter (ADC)

These inputs are multiplexed into the on-chip, successive

approximation, analog-to-digital converter. The ADC has a

resolution of 8 bits. The basic input range is 0 V to 2.5 V,

which is the input range of AIN6 to AIN9, but five of the

inputs have built-in attenuators to allow measurement of

VBAT, +5.0 V, -12 V, +12 V, and the processor core voltage

VCCP, without any external components. To allow the

tolerance of these supply voltages, the ADC produces an

ADM1026JSTZ-R7 数据表(PDF) 15 Page - ON Semiconductor

ADM1026JSTZ-R7 数据表(HTML) 15 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55

数据表下载

链接网址

ADM1026JSTZ-R7 数据表(PDF) 15 Page - ON Semiconductor

ADM1026JSTZ-R7 数据表(HTML) 15 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55

数据表 下载

链接网址

数据表下载