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AM186 数据表(PDF) 84 Page - Advanced Micro Devices

部件名 AM186
功能描述  High-Performance, 80C186- and 80C188-Compatible, 16-Bit Embedded Microcontrollers with RAM
PDF  112 Pages
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制造商  AMD [Advanced Micro Devices]
网页  http://www.amd.com
标志 AMD - Advanced Micro Devices

AM186 数据表(HTML) 84 Page - Advanced Micro Devices

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84
Am186TMER and Am188TMER Microcontrollers Data Sheet
DRAF
T
Switching Characteristics over Commercial and Industrial Operating Ranges
PSRAM Refresh Cycle (25 MHz and 33 MHz)
Notes:
All timing parameters are measured at VCC/2 with 50 pF loading on CLKOUTA unless otherwise noted. All output test conditions
are with CL=50 pF. For switching tests, VIL=0.3 V and VIH =VCC–0.3 V.
a
Testing is performed with equal loading on referenced pins.
Preliminary
Parameter
25 MHz
33 MHz
No.
Symbol
Description
Min
Max
Min
Max
Unit
General Timing Responses
9
tCHLH
ALE Active Delay
20
15
ns
10
tLHLL
ALE Width
tCLCL–10=30
tCLCL–10=20
ns
11
tCHLL
ALE Inactive Delay
20
15
ns
Read/Write Cycle Timing Responses
25
tCLRL
RD Active Delay
0
20
0
15
ns
26
tRLRH
RD Pulse Width
2tCLCL–15=65
2tCLCL–15=45
ns
27
tCLRH
RD Inactive Delay
0
20
0
15
ns
28
tRHLH
RD Inactive to ALE High(a)
tCLCH–3
tCLCH–3
ns
80
tCLCLX
LCS Inactive Delay
0
20
0
15
ns
81
tCLCSL
LCS Active Delay
0
20
0
15
ns
Refresh Timing Cycle Parameters
79
tCLRFD
CLKOUTA Low to RFSH Valid
0
20
0
15
ns
82
tCLRF
CLKOUTA High to RFSH Invalid
0
20
0
15
ns
85
tRFCY
RFSH Cycle Time
6 x tCLCL
6 x tCLCL
ns
86
tLCRF
LCS Inactive to RFSH Active Delay
2tCLCL–3
2tCLCL –3
ns



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