AM186 datasheet(11/112 Pages) AMD

11 / 112 page

Am186TMER and Am188TMER Microcontrollers Data Sheet

DRAF

May 2000

Under “SRDY/PIO6” on page 38, the following sentence was added: "When SRDY is configured as

P106, the internal SRDY signal is driven Low."

May 2000

In Table 8, “Maximum and Minimum Clock Frequencies,” on page 44, the values are changed in the

cell of row "Divide by 2" and column "X1/X2 Min" and in the cell of row "Divide by 2" and column

"CLKOUTA Min".

May 2000

In “Switching Characteristics over Commercial and Industrial Operating Ranges” on page 93, Max

value in the number "36" row was changed to "33."

May 2000

In “Switching Characteristics over Commercial and Industrial Operating Ranges” on page 94, the

value in "40 MHz Max" for row number 36 was changed to "33."

May 2000

In “Synchronous Ready Waveforms” on page 97, the diagram was changed.

May 2000

In “Asynchronous Ready Waveforms” on page 97, the diagram was changed.

May 2000

In "BHE/ADEN", on page 31, the second paragraph under ADEN was changed.

May 2000

In "UZI/CLKSEL2/PIO26", on page 38, the paragraph description of UZI was changed.

May 2000

In “Read Cycle Waveforms” on page 72, the UZI line in the diagram was changed.

May 2000

In “Write Cycle Waveforms” on page 75, the UZI line in the diagram was changed.

May 2000

Added the diagram, Table 11, “ARDY and SRDY Synchronization Logic Diagram,” on page 49.

May 2000

Added an index.

Date

Rev Description

AM186 数据表(PDF) 11 Page - Advanced Micro Devices