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AM186 数据表(PDF) 87 Page - Advanced Micro Devices

部件名 AM186
功能描述  High-Performance, 80C186- and 80C188-Compatible, 16-Bit Embedded Microcontrollers with RAM
PDF  112 Pages
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制造商  AMD [Advanced Micro Devices]
网页  http://www.amd.com
标志 AMD - Advanced Micro Devices

AM186 数据表(HTML) 87 Page - Advanced Micro Devices

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Am186TMER and Am188TMER Microcontrollers Data Sheet
87
DRAF
T
Switching Characteristics over Commercial and Industrial Operating Ranges
Interrupt Acknowledge Cycle (25 MHz and 33 MHz)
Notes:
All timing parameters are measured at VCC/2 with 50 pF loading on CLKOUTA, unless otherwise noted. All
output test conditions are with CL=50 pF. For switching tests, VIL=0.3 V and VIH =VCC–0.3 V.
a
Testing is performed with equal loading on referenced pins.
b
This parameter applies to the INTA1–INTA0 signals.
c
This parameter applies to the DEN and DT/R signals.
Preliminary
Parameter
25 MHz
33 MHz
No.
Symbol
Description
Min
Max
Min
Max
Unit
General Timing Requirements
1
tDVCL
Data in Setup
10
8
ns
2
tCLDX
Data in Hold
3
3
ns
General Timing Responses
3
tCHSV
Status Active Delay
0
20
0
15
ns
4
tCLSH
Status Inactive Delay
0
20
0
15
ns
7
tCLDV
Data Valid Delay
0
20
0
15
ns
8
tCHDX
Status Hold Time
0
0
ns
9
tCHLH
ALE Active Delay
20
15
ns
10
tLHLL
ALE Width
tCLCL–10=30
tCLCL–10=20
ns
11
tCHLL
ALE Inactive Delay
20
15
ns
12
tAVLL
AD Address Invalid to ALE Low(a)
tCLCH
tCLCH
ns
15
tCLAZ
AD Address Float Delay
tCLAX=0
20
tCLAX=0
15
ns
19
tDXDL
DEN Inactive to DT/R Low(a)
0
0
ns
20
tCVCTV
Control Active Delay 1(b)
0
20
0
15
ns
21
tCVDEX
DEN Inactive Delay
0
20
0
15
ns
22
tCHCTV
Control Active Delay 2(c)
0
20
0
15
ns
23
tLHAV
ALE High to Address Valid
15
10
ns
31
tCVCTX
Control Inactive Delay(b)
0
20
0
15
ns
68
tCHAV
CLKOUTA High to A Address Valid
0
20
0
15
ns



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