AM186 datasheet(14/112 Pages) AMD

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Am186TMER and Am188TMER Microcontrollers Data Sheet

DRAF

KEY FEATURES AND BENEFITS

The Am186ER and Am188ER microcontrollers are

higher-performance, highly integrated versions of the

80C186/80C188 microprocessors, offering a migration

path that was previously unavailable. New peripherals,

on-chip system interface logic, and 32 Kbyte of internal

memory on the Am186ER microcontroller reduce the

cost of existing 80C186/80C188 designs. Upgrading to

the Am186ER microcontroller is an attractive solution

for several reasons:

n Integrated SRAM—32 Kbyte of internal SRAM en-

sures a low-cost supply of memory and a smaller

form factor for system designs. The internal mem-

ory provides the same performance as external

zero-wait-state SRAM devices.

n 3.3-V operation with 5-V-tolerant I/O—3.3-V oper-

ation provides much lower power consumption

when compared to existing 5-V designs. Plus, the

Am186ER and Am188ER controllers accommodate

current 5-V designs with 5-V-tolerant I/O drivers.

n x86 software compatibility—80C186/80C188-

compatible and upward-compatible with the other

members of the AMD E86 family.

n Enhanced performance—The Am186ER and

Am188ER microcontrollers increase the perfor-

mance of 80C186/80C188 systems, and the non-

multiplexed address bus offers faster, unbuffered

access to commodity-speed, external memory.

n Enhanced

functionality—Enhanced

on-chip

peripherals include an asynchronous serial port, up

to 32 PIOs, a hardware watchdog timer, an

additional interrupt pin, a synchronous serial

interface, a PSRAM controller, a 16-bit reset

configuration register, and enhanced chip-select

functionality.

Application Considerations

The integration enhancements of the Am186ER micro-

controller provide a high-performance, low-system-

cost solution for 16-bit embedded microcontroller de-

signs. Both multiplexed and nonmultiplexed address

buses are available on the Am186ER and Am188ER

microcontrollers. The nonmultiplexed address bus

eliminates system-support logic ordinarily needed to

interface with external memory devices, while the mul-

tiplexed address/data bus maintains the value of previ-

ously engineered, customer-specific peripherals and

circuits within the upgraded design. Figure 1 on page

15 illustrates an example system design that uses the

integrated peripheral set to achieve high performance

with reduced system cost.

Internal Memory

The 32-Kbyte internal RAM fulfills the memory require-

ments for many embedded systems. These systems

can take advantage of the increased reliability, smaller

system form factor, decreased system power, stable

RAM supply, and lower system cost compared with

buying external SRAM. The integrated RAM also en-

sures that an entire embedded system will not require

requalification based on the short life cycles of external

SRAM. Additionally, for those systems using more

RAM than required because of the granularity of exter-

nal RAM, the Am186ER microcontroller provides a

closer system match.

Clock Generation

The integrated clock generation circuitr y of the

Am186ER and Am188ER microcontrollers enables the

processors to operate at up to four times the crystal fre-

quency. The design in Figure 1 achieves 50-MHz CPU

operation while using a 12.5-MHz crystal. The clocking

frequency function is controlled by an internal PLL. The

following modes are available (see Figure 10 on page

48):

n Divide by Two—The frequency of the fundamental

clock is half the frequency of the crystal with the PLL

disabled.

n Times One—The frequency of the fundamental

clock will be the same as the external crystal with

the PLL enabled.

n Times Four—The frequency of the fundamental

clock is four times the frequency of the crystal with

the PLL enabled.

The default mode is Times Four.

Memory Interface

The int egra ted mem or y con troller logic of th e

Am186ER and Am188ER microcontrollers provides a

direct address bus to memory devices. Using an exter-

nal address latch controlled by the address latch en-

able (ALE) signal is no longer necessary. Individual

byte-write-enable signals on the Am186ER and

Am188ER microcontrollers eliminate the need for ex-

ternal high/low byte-write-enable circuitry. The maxi-

mum bank size programmable for the memory chip-

select signals is increased to facilitate the use of high-

density memory devices.

The improved memory timing specifications for the

Am186ER and Am188ER microcontrollers facilitate the

use of external memory devices with 55-ns access

times at 50-MHz CPU operation. As a result, overall

system cost is significantly reduced as system design-

ers are able to use commonly available memory tech-

nology.

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