AM79C978VCSLASHW datasheet(107/261 Pages) AMD

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Am79C978

107

IOSPACE

I/O space indicator. Read as one;

write operations have no effect.

Indicating that this base address

address.

PCI Memory Mapped I/O Base Address Register

Offset 14h

The PCI Memory Mapped I/O Base Address register is

a 32-bit register that determines the location of the

Am79C978 I/O resources in all of memory space. It is

located at offset 14h in the PCI Configuration Space.

Bit

Name

Description

31-5

MEMBASE Memory mapped I/O base ad-

dress most significant 27 bits.

These bits are written by the host

to specify the location of the

Am79C978 I/O resources in all of

memory space. MEMBASE must

be written with a valid address

before the Am79C978 controller

slave memory mapped I/O mode

is turned on by setting the ME-

MEN bit (PCI Command register,

bit 1).

When the Am79C978 controller

is enabled for memory mapped

I/O mode (MEMEN is set), it mon-

itors the PCI bus for a valid mem-

ory command. If the value on

AD[31:5]

during

the

address

phase of the cycles matches the

value

MEMBASE,

the

Am79C978 controller will drive

DEVSEL indicating it will respond

to the access.

MEMBASE is read and written by

the host. MEMBASE is cleared

by H_RESET and is not affected

by S_RESET or by setting the

STOP bit.

MEMSIZE

Memory mapped I/O size re-

quirements. Read as zeros; write

operations have no effect.

MEMSIZE indicates the size of

the

memory

space

the

Am79C978 controller requires.

When the host writes a value of

FFFF FFFFh to the Memory

Mapped I/O Base Address regis-

ter, it will read back a value of 0 in

bit 4. That indicates a Am79C978

memory space requirement of 32

bytes.

PREFETCH Prefetchable. Read as zero; write

operations have no effect. Indi-

cates that memory space con-

trolled by this base address

in the memory mapped I/O space

cannot be prefetched. Because

one of the I/O resources in this

address space is a Reset regis-

ter, the order of the read access-

es is important.

2-1

TYPE

Memory type indicator. Read as

zeros; write operations have no

effect. Indicates that this base ad-

dress register is 32 bits wide and

mapping can be done anywhere

in the 32-bit memory space.

MEMSPACE Memory space indicator. Read

as zero; write operations have no

effect. Indicates that this base ad-

dress register describes a memo-

ry base address.

PCI Subsystem Vendor ID Register

Offset 2Ch

The PCI Subsystem Vendor ID register is a 16-bit reg-

ister that together with the PCI Subsystem ID uniquely

identifies the add-in card or subsystem the Am79C978

controller is used in. Subsystem Vendor IDs can be ob-

tained from the PCI SIG. A value of 0 (the default) indi-

cates that the Am79C978 controller does not support

subsystem identification. The PCI Subsystem Vendor

ID is an alias of BCR23, bits 15-0. It is programmable

through the EEPROM.

The PCI Subsystem Vendor ID register is located at off-

set 2Ch in the PCI Configuration Space. It is read only.

PCI Subsystem ID Register

Offset 2Eh

The PCI Subsystem ID register is a 16-bit register that

together with the PCI Subsystem Vendor ID uniquely

identifies the add-in card or subsystem the Am79C978

controller is used in. The value of the Subsystem ID is

up to the system vendor. A value of 0 (the default) indi-

cates that the Am79C978 controller does not support

subsystem identification. The PCI Subsystem ID is an

alias of BCR24, bits 15-0. It is programmable through

the EEPROM.

The PCI Subsystem ID register is located at offset 2Eh

in the PCI Configuration Space. It is read only.

AM79C978VC/W 数据表(PDF) 107 Page - Advanced Micro Devices

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