AM79C978VCSLASHW datasheet(110/261 Pages) AMD

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110

Am79C978

D2_SPT

D2 Support. If this bit is a 1, this

function supports the D2 Power

Management State.

This bit is read only.

D1_SPT

D1 Support. If this bit is a 1, this

function supports the D1 Power

Management State.

This bit is read only.

8-6

AUX_CURRENT

Auxiliary Current Requirements.

This

3-bit

field

reports

the

3.3Vaux current requirements for

the PCI function. If the Data Reg-

ister has been implemented by

this function, then reads of this

field must return a value of 000b

and the Data Register will take

precedence over this field for

3.3Vaux current requirement re-

porting.

If PME generation from D3cold is

not supported by the function

(PMC (15) = 0), this field must re-

turn a value of 000b when read.

For functions that support PME

from D3cold and do not implement

the Data Register, the following

bit assignments apply:

These bits are read only.

DSI

Device

Specific

Initialization.

When this bit is 1, it indicates that

special initialization of the func-

tion is required (beyond the stan-

dard PCI configuration header)

before the generic class device

driver is able to use it.

This bit is read only.

RES

Reserved location.

PME_CLK

PME Clock. When this bit is a 1,

it indicates that the function relies

on the presence of the PCI clock

for PME operation. When this bit

is a 0 it indicates that no PCI

clock is required for the function

to generate PME.

Functions that do not support

PME generation in any state

must return 0 for this field.

This bit is read only.

2-0

PMIS_VER Power

Management

Interface

Specification Version. A value of

001b indicates that this function

complies with revision 1.0 of the

PCI Power Management Inter-

face Specification.

PCI Power Management Control/Status Register

(PMCSR)

Offset 44h

Bit

Name

Description

PME_STATUS PME Status. This bit is set when

the function would normally as-

sert the PME signal independent

of the state of the PME_EN bit.

Writing a 1 to this bit will clear it

and cause the function to stop as-

serting a PME (if enabled). Writ-

ing a 0 has no effect.

If the function supports PME from

D3cold, then this bit is sticky and

must be explicitly cleared by the

operating system each time the

operating system is initially load-

ed.

This bit is always read/write ac-

cessible. Sticky bit. This bit is re-

set

POR.

H_RESET,

S_RESET, or setting the STOP

bit has no effect.

Bit

8 7 6

3.3Vaux

Max. Current Required

1 1 1

375 mA

1 1 0

320 mA

1 0 1

270 mA

1 0 0

220 mA

0 1 1

160 mA

0 1 0

100 mA

0 0 1

55 mA

0 0 0

0 (self-powered)

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