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CS494002 数据表(PDF) 55 Page - Cirrus Logic

部件名 CS494002
功能描述  Multi-Standard Audio Decoder Family
PDF  100 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS494002 数据表(HTML) 55 Page - Cirrus Logic

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6.2.7 Procedures for Parallel Host Mode
Communication for DSPAB
6.2.7.1 Control Write in a Parallel Host Mode
for DSPAB
When writing control data to DSPAB, the same
protocol is used whether the host is writing a
control message or an entire executable download
image. Messages sent to DSPAB should be written
most significant byte first. Likewise, downloads of
the application code should also be performed most
significant byte first.
The example shown in this section can be
generalized to fit any control write situation. The
generic function ‘Read_Byte_*()’ is used in the
following example as a generalized reference to
either Read_Byte_MOT() (read a byte in Motorola
mode) or Read_Byte_INT() (read a byte in Intel
mode), and ‘Write_Byte_*()’ is a generic reference
to Write_Byte_MOT() (write a byte in Motorola
mode) or Write_Byte_INT() (write a byte in Intel
mode). Figure 40 shows a typical write sequence.
The protocol presented in Figure 40 will now be
described in detail.
1) When the host is communicating with DSPAB,
the host must verify that DSPAB is ready to
accept a new control byte. If DSPAB has not
read the previous byte from the control port, it
will be unable to receive another byte.
2) In order to determine whether DSPAB is ready
to accept a new control byte the host must read
the HINBSY bit of the Host Control Register
(bit 2 in FA[1:0]=01b) using the selected
communication mode (Intel or Motorola). If
HINBSY is high, then the DSP is not prepared
to accept a new control byte, and the host
should poll the Host Control Register again. If
HINBSY is low, then the host may write a
control byte into the Host Message Register.
3) Once the host knows that the DSP is ready for
a new control byte, it should write the control
byte to the Host Message Register (FA[1:0] =
00b) using the selected communication mode
(Intel or Motorola).
4) If the host would like to write any more control
bytes to DSPAB, the host should once again
poll the Host Control Register (return to step 1).
6.2.7.2 Control Read in a Parallel Host Mode
for DSPAB
When reading control data from DSPAB, the same
protocol is used whether the host is reading a single
byte, a 6 byte message, or a string of messages.
During the boot procedure, a handshaking protocol
is used by DSPAB. This handshake consists of a 3
byte write to DSPAB followed by a 1 byte response
from the DSP. The host must read the response byte
and act accordingly. The boot procedure is
discussed in Section 8 “Boot Procedure” on page
71.
During
regular operation (at run-time), the
responses from DSPAB will always be 6 bytes in
length.
MORE BYTES
TO WRITE?
READ_BYTE_*(HOST
CONTROL REGISTER)
N
FINISHED
Y
WRITE_BYTE_*(HOST
MESSAGE REGISTER)
HINBSY == 1
Y
N
Figure 40. Typical Parallel Host Mode Control
Write Sequence Flow Diagram for DSPAB



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