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CS494002 数据表(PDF) 23 Page - Cirrus Logic |
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CS494002 数据表(HTML) 23 Page - Cirrus Logic |
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23 / 100 page ![]() 23 1.15 Switching Characteristics — Serial Audio Input (DSPC) (TA =25 °C; VDD, PLLVDD = 2.5 V; VDDSD = 3.3 V; CL =20pF) Notes: 1. Slave mode is defined as SCLKN and LRCLKN being driven by an external source. 2. This timing parameter is defined from the active edge of SCLKN. The active edge of SCLKN is the point at which the data is valid. Parameter Symbol Min Max Unit Slave Mode SCLKN period for Slave mode Tsclki 40 - ns SCLKN duty cycle for Slave mode 45 55 % Time from active edge of SCLKN to LRCLKN transition Tstlr 20 - ns Time from LRCLKN transition to SCLKN active edge Tlrts 20 - ns SDATAN0 setup to SCLKN transition (Notes 2) Tsdsus 10 - ns SDATAN0 hold time after SCLKN transition (Notes 2) Tsdhs 10 - ns SCLKN Tsclki SDATAN0, 1, 2, 3 LRCLKN Tlrts Tstlr Tsdsus Tsdhs Figure 14. Serial Audio Input Data, Slave Clock Timing |
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